From patchwork Thu Apr 25 07:50:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nakajima, Jun" X-Patchwork-Id: 2487391 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 93EB1DF5B1 for ; Thu, 25 Apr 2013 07:50:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756119Ab3DYHuz (ORCPT ); Thu, 25 Apr 2013 03:50:55 -0400 Received: from mail-vb0-f49.google.com ([209.85.212.49]:59534 "EHLO mail-vb0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755873Ab3DYHuz (ORCPT ); Thu, 25 Apr 2013 03:50:55 -0400 Received: by mail-vb0-f49.google.com with SMTP id 11so2423923vbf.36 for ; Thu, 25 Apr 2013 00:50:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-received:date:message-id:subject:from:to :content-type:x-gm-message-state; bh=yYUOIfD+UNaqqrAAv+supL5aID81rOkA7VMb9Rx3rlA=; b=PW/G78ZLY5HL07G6avvyihpCxU5WrmxTOMt+O99FWKezfpgPfkX7K5LYUKWEucqYuY K6TjT3h25ze4yQY6TwPWI7uhE8lakrSwtuyGFnuRiCeEpKIqc6+lK/EdKG0EJF7AplVN oDlPdWYUx/CUrJ0QjyaMHPYhUpf5w+w9Fkat5stH2CMpnOB4Ids7FZi6IlG7vPHnqdnr iuQEwAlCBY6NA0mXtKhK0VIfUlU7BsMituHL9S2g4kMTvs9CnfdvEOxO+STWu4I+pJkB JlnqvbEmMBfjhtBuELMqIzJAW8NZy1Hyli65rRbUZqUhgF9LB/BPNipERnE5J2jHHbzp CiXw== MIME-Version: 1.0 X-Received: by 10.220.115.135 with SMTP id i7mr26230892vcq.30.1366876254362; Thu, 25 Apr 2013 00:50:54 -0700 (PDT) Received: by 10.58.64.196 with HTTP; Thu, 25 Apr 2013 00:50:54 -0700 (PDT) Date: Thu, 25 Apr 2013 00:50:54 -0700 Message-ID: Subject: [PATCH 04/12] Subject: [PATCH 04/10] nEPT: Fix cr3 handling in nested exit and entry From: "Nakajima, Jun" To: "kvm@vger.kernel.org" X-Gm-Message-State: ALoCoQn+pO3hCf7CMpMK0W19pfbNryewkadjX2SMpJ9T9/1VvqKitX3mrnTo8cU7OR8va8wDASeC Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The existing code for handling cr3 and related VMCS fields during nested exit and entry wasn't correct in all cases: If L2 is allowed to control cr3 (and this is indeed the case in nested EPT), during nested exit we must copy the modified cr3 from vmcs02 to vmcs12, and we forgot to do so. This patch adds this copy. If L0 isn't controlling cr3 when running L2 (i.e., L0 is using EPT), and whoever does control cr3 (L1 or L2) is using PAE, the processor might have saved PDPTEs and we should also save them in vmcs12 (and restore later). Signed-off-by: Nadav Har'El Signed-off-by: Jun Nakajima modified: arch/x86/kvm/vmx.c --- arch/x86/kvm/vmx.c | 37 ++++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) } @@ -7397,6 +7413,25 @@ void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) vmcs12->guest_pending_dbg_exceptions = vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS); + /* + * In some cases (usually, nested EPT), L2 is allowed to change its + * own CR3 without exiting. If it has changed it, we must keep it. + * Of course, if L0 is using shadow page tables, GUEST_CR3 was defined + * by L0, not L1 or L2, so we mustn't unconditionally copy it to vmcs12. + */ + if (enable_ept) + vmcs12->guest_cr3 = vmcs_read64(GUEST_CR3); + /* + * Additionally, except when L0 is using shadow page tables, L1 or + * L2 control guest_cr3 for L2, so save their PDPTEs + */ + if (enable_ept) { + vmcs12->guest_pdptr0 = vmcs_read64(GUEST_PDPTR0); + vmcs12->guest_pdptr1 = vmcs_read64(GUEST_PDPTR1); + vmcs12->guest_pdptr2 = vmcs_read64(GUEST_PDPTR2); + vmcs12->guest_pdptr3 = vmcs_read64(GUEST_PDPTR3); + } + /* TODO: These cannot have changed unless we have MSR bitmaps and * the relevant bit asks not to trap the change */ vmcs12->guest_ia32_debugctl = vmcs_read64(GUEST_IA32_DEBUGCTL); -- 1.8.2.1.610.g562af5b -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index f2fd79d..d4bfd32 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -7162,10 +7162,26 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) vmx_set_cr4(vcpu, vmcs12->guest_cr4); vmcs_writel(CR4_READ_SHADOW, nested_read_cr4(vmcs12)); - /* shadow page tables on either EPT or shadow page tables */ + /* + * Note that kvm_set_cr3() and kvm_mmu_reset_context() will do the + * right thing, and set GUEST_CR3 and/or EPT_POINTER in all supported + * settings: 1. shadow page tables on shadow page tables, 2. shadow + * page tables on EPT, 3. EPT on EPT. + */ kvm_set_cr3(vcpu, vmcs12->guest_cr3); kvm_mmu_reset_context(vcpu); + /* + * Additionally, except when L0 is using shadow page tables, L1 or + * L2 control guest_cr3 for L2, so they may also have saved PDPTEs + */ + if (enable_ept) { + vmcs_write64(GUEST_PDPTR0, vmcs12->guest_pdptr0); + vmcs_write64(GUEST_PDPTR1, vmcs12->guest_pdptr1); + vmcs_write64(GUEST_PDPTR2, vmcs12->guest_pdptr2); + vmcs_write64(GUEST_PDPTR3, vmcs12->guest_pdptr3); + } + kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->guest_rsp); kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->guest_rip);