Message ID | EF5A1D57CFBD5A4BA5EB3ED985B6DC6E0316CE5D@SHSMSX101.ccr.corp.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 09/01/2012 11:12 AM, Mao, Junjie wrote: > The INVPCID enabling test assumes cr3[11:0] is 0. But at present PCID enabling > test sets cr3[11:0] to 1 for its own purpose and doesn't restore the register, > which leads to a failure when INVPCID test tries to enable PCIDE. > > This patch restores cr3 after PCID enabling test is done so that PCIDE can be > enabled normally in later tests. Thanks, applied.
diff --git a/x86/pcid.c b/x86/pcid.c index de0f6fe..8bfeba2 100644 --- a/x86/pcid.c +++ b/x86/pcid.c @@ -79,6 +79,7 @@ void test_pcid_enabled(void) write_cr3(cr3 | 0x001); if (write_cr4_checking(cr4 | X86_CR4_PCIDE) != GP_VECTOR) goto report; + write_cr3(cr3); passed = 1;
The INVPCID enabling test assumes cr3[11:0] is 0. But at present PCID enabling test sets cr3[11:0] to 1 for its own purpose and doesn't restore the register, which leads to a failure when INVPCID test tries to enable PCIDE. This patch restores cr3 after PCID enabling test is done so that PCIDE can be enabled normally in later tests. Signed-off-by: Junjie Mao <junjie.mao@intel.com> --- x86/pcid.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html