diff mbox series

[5/6] x86: Avoid magic number with ELCR register accesses

Message ID alpine.DEB.2.21.2107200237300.9461@angie.orcam.me.uk (mailing list archive)
State New, archived
Headers show
Series x86: PIRQ/ELCR-related fixes and updates | expand

Commit Message

Maciej W. Rozycki July 20, 2021, 3:28 a.m. UTC
Define PIC_ELCR1 and PIC_ELCR2 macros for accesses to the ELCR registers 
implemented by many chipsets in their embedded 8259A PIC cores, avoiding 
magic numbers that are difficult to handle, and complementing the macros 
we already have for registers originally defined with discrete 8259A PIC 
implementations.  No functional change.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
---
This deliberately doesn't touch KVM, which refrains from using macros for 
any PIC accesses.
---
 arch/x86/include/asm/i8259.h   |    2 ++
 arch/x86/kernel/acpi/boot.c    |    6 +++---
 arch/x86/kernel/apic/io_apic.c |    2 +-
 arch/x86/kernel/apic/vector.c  |    2 +-
 arch/x86/kernel/i8259.c        |    8 ++++----
 arch/x86/kernel/mpparse.c      |    3 ++-
 arch/x86/pci/irq.c             |    3 ++-
 7 files changed, 15 insertions(+), 11 deletions(-)

linux-x86-pic-elcr.diff
diff mbox series

Patch

Index: linux-macro-pirq/arch/x86/include/asm/i8259.h
===================================================================
--- linux-macro-pirq.orig/arch/x86/include/asm/i8259.h
+++ linux-macro-pirq/arch/x86/include/asm/i8259.h
@@ -19,6 +19,8 @@  extern unsigned int cached_irq_mask;
 #define PIC_MASTER_OCW3		PIC_MASTER_ISR
 #define PIC_SLAVE_CMD		0xa0
 #define PIC_SLAVE_IMR		0xa1
+#define PIC_ELCR1		0x4d0
+#define PIC_ELCR2		0x4d1
 
 /* i8259A PIC related value */
 #define PIC_CASCADE_IR		2
Index: linux-macro-pirq/arch/x86/kernel/acpi/boot.c
===================================================================
--- linux-macro-pirq.orig/arch/x86/kernel/acpi/boot.c
+++ linux-macro-pirq/arch/x86/kernel/acpi/boot.c
@@ -570,7 +570,7 @@  void __init acpi_pic_sci_set_trigger(uns
 	unsigned int old, new;
 
 	/* Real old ELCR mask */
-	old = inb(0x4d0) | (inb(0x4d1) << 8);
+	old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8);
 
 	/*
 	 * If we use ACPI to set PCI IRQs, then we should clear ELCR
@@ -596,8 +596,8 @@  void __init acpi_pic_sci_set_trigger(uns
 		return;
 
 	pr_warn("setting ELCR to %04x (from %04x)\n", new, old);
-	outb(new, 0x4d0);
-	outb(new >> 8, 0x4d1);
+	outb(new, PIC_ELCR1);
+	outb(new >> 8, PIC_ELCR2);
 }
 
 int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
Index: linux-macro-pirq/arch/x86/kernel/apic/io_apic.c
===================================================================
--- linux-macro-pirq.orig/arch/x86/kernel/apic/io_apic.c
+++ linux-macro-pirq/arch/x86/kernel/apic/io_apic.c
@@ -764,7 +764,7 @@  static bool irq_active_low(int idx)
 static bool EISA_ELCR(unsigned int irq)
 {
 	if (irq < nr_legacy_irqs()) {
-		unsigned int port = 0x4d0 + (irq >> 3);
+		unsigned int port = PIC_ELCR1 + (irq >> 3);
 		return (inb(port) >> (irq & 7)) & 1;
 	}
 	apic_printk(APIC_VERBOSE, KERN_INFO
Index: linux-macro-pirq/arch/x86/kernel/apic/vector.c
===================================================================
--- linux-macro-pirq.orig/arch/x86/kernel/apic/vector.c
+++ linux-macro-pirq/arch/x86/kernel/apic/vector.c
@@ -1299,7 +1299,7 @@  static void __init print_PIC(void)
 
 	pr_debug("... PIC  ISR: %04x\n", v);
 
-	v = inb(0x4d1) << 8 | inb(0x4d0);
+	v = inb(PIC_ELCR2) << 8 | inb(PIC_ELCR1);
 	pr_debug("... PIC ELCR: %04x\n", v);
 }
 
Index: linux-macro-pirq/arch/x86/kernel/i8259.c
===================================================================
--- linux-macro-pirq.orig/arch/x86/kernel/i8259.c
+++ linux-macro-pirq/arch/x86/kernel/i8259.c
@@ -235,15 +235,15 @@  static char irq_trigger[2];
  */
 static void restore_ELCR(char *trigger)
 {
-	outb(trigger[0], 0x4d0);
-	outb(trigger[1], 0x4d1);
+	outb(trigger[0], PIC_ELCR1);
+	outb(trigger[1], PIC_ELCR2);
 }
 
 static void save_ELCR(char *trigger)
 {
 	/* IRQ 0,1,2,8,13 are marked as reserved */
-	trigger[0] = inb(0x4d0) & 0xF8;
-	trigger[1] = inb(0x4d1) & 0xDE;
+	trigger[0] = inb(PIC_ELCR1) & 0xF8;
+	trigger[1] = inb(PIC_ELCR2) & 0xDE;
 }
 
 static void i8259A_resume(void)
Index: linux-macro-pirq/arch/x86/kernel/mpparse.c
===================================================================
--- linux-macro-pirq.orig/arch/x86/kernel/mpparse.c
+++ linux-macro-pirq/arch/x86/kernel/mpparse.c
@@ -19,6 +19,7 @@ 
 #include <linux/smp.h>
 #include <linux/pci.h>
 
+#include <asm/i8259.h>
 #include <asm/io_apic.h>
 #include <asm/acpi.h>
 #include <asm/irqdomain.h>
@@ -251,7 +252,7 @@  static int __init ELCR_trigger(unsigned
 {
 	unsigned int port;
 
-	port = 0x4d0 + (irq >> 3);
+	port = PIC_ELCR1 + (irq >> 3);
 	return (inb(port) >> (irq & 7)) & 1;
 }
 
Index: linux-macro-pirq/arch/x86/pci/irq.c
===================================================================
--- linux-macro-pirq.orig/arch/x86/pci/irq.c
+++ linux-macro-pirq/arch/x86/pci/irq.c
@@ -18,6 +18,7 @@ 
 #include <linux/irq.h>
 #include <linux/acpi.h>
 
+#include <asm/i8259.h>
 #include <asm/pc-conf-reg.h>
 #include <asm/pci_x86.h>
 
@@ -159,7 +160,7 @@  static void __init pirq_peer_trick(void)
 void elcr_set_level_irq(unsigned int irq)
 {
 	unsigned char mask = 1 << (irq & 7);
-	unsigned int port = 0x4d0 + (irq >> 3);
+	unsigned int port = PIC_ELCR1 + (irq >> 3);
 	unsigned char val;
 	static u16 elcr_irq_mask;