From patchwork Mon Jan 22 23:52:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13526432 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B99624F8B8; Mon, 22 Jan 2024 23:54:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967699; cv=none; b=ruEdS/OvllmOUvS2X39NW0ZUzWQKjW7+HQ5o++Kbc7swb6MwqEvbH0P0lw765WUCduYFGFB7EvwS0BETxzNcnBmCkYilQHzoMFZXvDTr5F5ja+6+S/xVx7d7xjtT2M99t6Cu7e7jQYuhHrNJfTzeZoa52JXad0TopWmC1+EjVM8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967699; c=relaxed/simple; bh=Nj3sGVOPOa2U4ZhrHG9mbftmGqZAnSw3WqdxXHZajTs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cA/h+4I5BIrbTxddc7tJc6eFhjqG9iRB76ZbsH2YWAjDo4xP7RcEXlE4FWwiVkgJAEvSg57oyDFvclygfbL+s8IufiTZl5nB7JKhpvddBHxXFJhke/Sdt6tFzopph3y08dAVG/wctt+RqwqucANWltyg46moClghkTMtnNNjWNM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kAI4mcXM; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kAI4mcXM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705967698; x=1737503698; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Nj3sGVOPOa2U4ZhrHG9mbftmGqZAnSw3WqdxXHZajTs=; b=kAI4mcXM03sZKN7qO5k0ddUXP8DLpvd6tXOfMFCaHtdyi5X07dDcHwJw 9bpW0rnMn3JL0Vl8Uag07WUX5UG4FgKcu3sJGIPNCcjIpyKjj5Rc41f4T 3TLFwhr4XXdmaW8thLORxcXgqLlg3j+qwUVPxWugpD4DqtYFO6Y+AHE89 i0ldiEbORXxiE3bR9j/rAwgn1QiJx9clyGKFg6sSkTITAOyJl/11x+BLi TdVScloeLKifoqie7KMFl3u0w8+jMXW1u5Wrfni4X7RTe+cTifu5rWelX d4ddo+VujDOutk1QNuBIdxG5QIVNn/0iXGBWDs2/BXWBxe/J2jqHt62b7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="1217837" X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="1217837" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:54:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="1350139" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:54:57 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v18 009/121] KVM: TDX: Add placeholders for TDX VM/vcpu structure Date: Mon, 22 Jan 2024 15:52:45 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata Add placeholders TDX VM/vcpu structure that overlays with VMX VM/vcpu structures. Initialize VM structure size and vcpu size/align so that x86 KVM common code knows those size irrespective of VMX or TDX. Those structures will be populated as guest creation logic develops. Add helper functions to check if the VM is guest TD and add conversion functions between KVM VM/VCPU and TDX VM/VCPU. Signed-off-by: Isaku Yamahata --- v14 -> v15: - use KVM_X86_TDX_VM --- arch/x86/kvm/vmx/main.c | 18 +++++++++++++-- arch/x86/kvm/vmx/tdx.c | 1 + arch/x86/kvm/vmx/tdx.h | 50 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+), 2 deletions(-) create mode 100644 arch/x86/kvm/vmx/tdx.h diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index 1e1feaacac59..f6b66f18c070 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -5,6 +5,7 @@ #include "vmx.h" #include "nested.h" #include "pmu.h" +#include "tdx.h" static bool enable_tdx __ro_after_init; module_param_named(tdx, enable_tdx, bool, 0444); @@ -216,6 +217,21 @@ static int __init vt_init(void) */ hv_init_evmcs(); + /* + * kvm_x86_ops is updated with vt_x86_ops. vt_x86_ops.vm_size must + * be set before kvm_x86_vendor_init(). + */ + vcpu_size = sizeof(struct vcpu_vmx); + vcpu_align = __alignof__(struct vcpu_vmx); + if (enable_tdx) { + vt_x86_ops.vm_size = max_t(unsigned int, vt_x86_ops.vm_size, + sizeof(struct kvm_tdx)); + vcpu_size = max_t(unsigned int, vcpu_size, + sizeof(struct vcpu_tdx)); + vcpu_align = max_t(unsigned int, vcpu_align, + __alignof__(struct vcpu_tdx)); + } + r = vmx_init(); if (r) goto err_vmx_init; @@ -228,8 +244,6 @@ static int __init vt_init(void) * Common KVM initialization _must_ come last, after this, /dev/kvm is * exposed to userspace! */ - vcpu_size = sizeof(struct vcpu_vmx); - vcpu_align = __alignof__(struct vcpu_vmx); r = kvm_init(vcpu_size, vcpu_align, THIS_MODULE); if (r) goto err_kvm_init; diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 8a378fb6f1d4..1c9884164566 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -6,6 +6,7 @@ #include "capabilities.h" #include "x86_ops.h" #include "x86.h" +#include "tdx.h" #undef pr_fmt #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h new file mode 100644 index 000000000000..473013265bd8 --- /dev/null +++ b/arch/x86/kvm/vmx/tdx.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __KVM_X86_TDX_H +#define __KVM_X86_TDX_H + +#ifdef CONFIG_INTEL_TDX_HOST +struct kvm_tdx { + struct kvm kvm; + /* TDX specific members follow. */ +}; + +struct vcpu_tdx { + struct kvm_vcpu vcpu; + /* TDX specific members follow. */ +}; + +static inline bool is_td(struct kvm *kvm) +{ + return kvm->arch.vm_type == KVM_X86_TDX_VM; +} + +static inline bool is_td_vcpu(struct kvm_vcpu *vcpu) +{ + return is_td(vcpu->kvm); +} + +static inline struct kvm_tdx *to_kvm_tdx(struct kvm *kvm) +{ + return container_of(kvm, struct kvm_tdx, kvm); +} + +static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) +{ + return container_of(vcpu, struct vcpu_tdx, vcpu); +} +#else +struct kvm_tdx { + struct kvm kvm; +}; + +struct vcpu_tdx { + struct kvm_vcpu vcpu; +}; + +static inline bool is_td(struct kvm *kvm) { return false; } +static inline bool is_td_vcpu(struct kvm_vcpu *vcpu) { return false; } +static inline struct kvm_tdx *to_kvm_tdx(struct kvm *kvm) { return NULL; } +static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) { return NULL; } +#endif /* CONFIG_INTEL_TDX_HOST */ + +#endif /* __KVM_X86_TDX_H */