From patchwork Mon Jan 22 23:53:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13526465 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4059B5FBB2; Mon, 22 Jan 2024 23:55:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967733; cv=none; b=epmfJlboczhXqHrPJRs0QV96tdcittZRaExepRxbrv6Kb+4awIjmM+w/ZhX0aHDuJ7EzeADC+Qs5uO6QA3fvkTQtpJqZ+DFyH2ZQ7zwKFb1q0VLxMJlO3z6Q9xalhLPu4gu588HCvzGRxOlBVa1BhtpEnewafxJ/sFnc+FNJ9/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967733; c=relaxed/simple; bh=T0G+wyzg6peVVuQpzmfCAbdhJRY4oN9F1S3CdOfBOOk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=A6p35wlOV1qMKPGhJi5tZh5gMVwcg3rUsc5MT95/09dah2uu2I2okfg2QVVmaazIJ+fVs34pBXIdrYZwKRx9tLQBtMbj5eD+/uQ3xwWRmOeyz/JR+XdJ9etKzt1pFmgJeZXE1sjmRnVcSiN5ZcxU5wTG9j57dLvf4F5+3DNHUMs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=T8ybvg2N; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="T8ybvg2N" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705967733; x=1737503733; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=T0G+wyzg6peVVuQpzmfCAbdhJRY4oN9F1S3CdOfBOOk=; b=T8ybvg2NkNyJGjsl0D5qz97qg+/JQz+RUfAQFBV9ivbqj+VmI8sfTzY0 GodCGr8bFyqJXborXxgpBF5MhJagS51Q9B+DeIvmNsrJw4+0rhL8+/M84 qh10SgfvgULO5XJszT9/6TSxrM7K+p57Juyyl3XybR9G1ImyTICwI+KhC 6kIWfP8dl0maZseLOfxh50Xd9nUGUN9/ruXqRR/0ux9Uo3k6CWuDdYiRs t9WVbCCvIO2aQe0S/0wI9jpnUDPt1tWsHRIh6RmVfJ9+2EegP+FuaMsfo 0/fc2gU24N0pyKxjQ36X0iYYpdpY+jEDZ1WWv+ijviaee+mUngXkt0Xv1 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="8016356" X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="8016356" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="1468081" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:28 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com, Sean Christopherson Subject: [PATCH v18 041/121] KVM: x86/mmu: Allow per-VM override of the TDP max page level Date: Mon, 22 Jan 2024 15:53:17 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Sean Christopherson TDX requires special handling to support large private page. For simplicity, only support 4K page for TD guest for now. Add per-VM maximum page level support to support different maximum page sizes for TD guest and conventional VMX guest. Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata Acked-by: Kai Huang --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu/mmu.c | 2 ++ arch/x86/kvm/mmu/mmu_internal.h | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 430d7bd7c37c..313519edd79e 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1283,6 +1283,7 @@ struct kvm_arch { unsigned long n_requested_mmu_pages; unsigned long n_max_mmu_pages; unsigned int indirect_shadow_pages; + int tdp_max_page_level; u8 mmu_valid_gen; struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; struct list_head active_mmu_pages; diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 54d4c8f1ba68..e93bc16a5e9b 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -6307,6 +6307,8 @@ void kvm_mmu_init_vm(struct kvm *kvm) kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache; kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO; + + kvm->arch.tdp_max_page_level = KVM_MAX_HUGEPAGE_LEVEL; } static void mmu_free_vm_memory_caches(struct kvm *kvm) diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h index 0443bfcf5d9c..2b9377442927 100644 --- a/arch/x86/kvm/mmu/mmu_internal.h +++ b/arch/x86/kvm/mmu/mmu_internal.h @@ -296,7 +296,7 @@ static inline int kvm_mmu_do_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, .nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(vcpu->kvm), - .max_level = KVM_MAX_HUGEPAGE_LEVEL, + .max_level = vcpu->kvm->arch.tdp_max_page_level, .req_level = PG_LEVEL_4K, .goal_level = PG_LEVEL_4K, };