From patchwork Mon Jan 22 23:54:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13526509 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 029EB67E61; Mon, 22 Jan 2024 23:55:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.55.52.120 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967759; cv=none; b=LrWFYGB/YqtoNLkHeJ8JZoA9CXG/NZ71ZSgBzw/Hfh6A1NKiHQ6czGg5g+dEb7AjbXgGce1fREwJ9jZtVM5LfK7trfJPZWTB7+9VahurLem4XfYUXMDUz/p5uHw3WF0gdYFrmjd+UNvrwG1IsA26nWdpOZMH3Cu4vCYZsuOmsE4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967759; c=relaxed/simple; bh=Tj1moyvtopfH0YsxMEQryvtJWQM9UcKp0+soKrvK55s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=S+z/zR+km17ISqhTbk6vI5kAIb5eUgPFVRfMl8BhHwbTrQHIErhlDn8cwwR0RtIUj5xYgagmslLGLIw3/XEEOmeIgV8q1bt9cXlg7rLVtUNN/XOUSVvjBdZ+DEGxINWc2K0EC/nuovSTX1OuzOn8RtxgHzJGLqCwbgOvk2Ir9TY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lqyYfjAS; arc=none smtp.client-ip=192.55.52.120 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lqyYfjAS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705967757; x=1737503757; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Tj1moyvtopfH0YsxMEQryvtJWQM9UcKp0+soKrvK55s=; b=lqyYfjASxHqpkNZ3A0XODaOcaupYFYdVmI2KkeeD+JeX6y3TVIOwiB/H 81VVcRcTnw6qIK9jLo+w+JJXohQV41nDPRdc9S1/pobgCwD45K7jZbS09 dXONVK68R/URyiU5m2CYO6m2X1f8VetyewL6zeXFox7+ARQtjjgXeRYRb JuBTIX39+4lABqlb3iRKJnZ6+PzNRWCWt3FfO1JF3D+bWHy1n8i7TTl1Y nW2KgXRhFtrM9IOVr3mkrfZQMNE/pNkDsaIioFsgFwFvJD8FjO5DyMTgR pZoRHfYuTBCgPxX9f+4quqjwuw0W+MQ/Hm2AJ2Z+lLcm+NxmYdmQIFNQv Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="400217834" X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="400217834" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="27817954" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:48 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v18 091/121] KVM: TDX: handle EXCEPTION_NMI and EXTERNAL_INTERRUPT Date: Mon, 22 Jan 2024 15:54:07 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata Because guest TD state is protected, exceptions in guest TDs can't be intercepted. TDX VMM doesn't need to handle exceptions. tdx_handle_exit_irqoff() handles NMI and machine check. Ignore NMI and machine check and continue guest TD execution. For external interrupt, increment stats same to the VMX case. Signed-off-by: Isaku Yamahata Reviewed-by: Paolo Bonzini --- arch/x86/kvm/vmx/tdx.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 4418f04a1cf1..fb3f6819e97a 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -968,6 +968,25 @@ void tdx_handle_exit_irqoff(struct kvm_vcpu *vcpu) vmx_handle_exception_irqoff(vcpu, tdexit_intr_info(vcpu)); } +static int tdx_handle_exception(struct kvm_vcpu *vcpu) +{ + u32 intr_info = tdexit_intr_info(vcpu); + + if (is_nmi(intr_info) || is_machine_check(intr_info)) + return 1; + + kvm_pr_unimpl("unexpected exception 0x%x(exit_reason 0x%llx qual 0x%lx)\n", + intr_info, + to_tdx(vcpu)->exit_reason.full, tdexit_exit_qual(vcpu)); + return -EFAULT; +} + +static int tdx_handle_external_interrupt(struct kvm_vcpu *vcpu) +{ + ++vcpu->stat.irq_exits; + return 1; +} + static int tdx_handle_triple_fault(struct kvm_vcpu *vcpu) { vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN; @@ -1435,6 +1454,10 @@ int tdx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t fastpath) WARN_ON_ONCE(fastpath != EXIT_FASTPATH_NONE); switch (exit_reason.basic) { + case EXIT_REASON_EXCEPTION_NMI: + return tdx_handle_exception(vcpu); + case EXIT_REASON_EXTERNAL_INTERRUPT: + return tdx_handle_external_interrupt(vcpu); case EXIT_REASON_EPT_VIOLATION: return tdx_handle_ept_violation(vcpu); case EXIT_REASON_EPT_MISCONFIG: