From patchwork Sun Oct 30 06:22:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13024876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0A9EFA3745 for ; Sun, 30 Oct 2022 06:24:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229772AbiJ3GYD (ORCPT ); Sun, 30 Oct 2022 02:24:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229574AbiJ3GYA (ORCPT ); Sun, 30 Oct 2022 02:24:00 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BD9BA9; Sat, 29 Oct 2022 23:23:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667111039; x=1698647039; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fd2r6Nl585pvLjCHmTFv0mAVqQ4w+HXhAjGFyyRQkdE=; b=Xk5Aa0fZ+LBqTAt94gFWG8VFy2zgIXLRdodoMWcg5Yvrxg8wDJWhObmH WBEnW9U7pJmmRqldKH90Ca9Xq0bzA+jHE6FZAit+rIpyBMShEnPN8K7oR ZCuveSNfz2r7zihESm1zggLAf2ZZJF80E/Vzs2b/mgZ671NUS6S83XdG+ Q+CJUTbTBRJr4aST7s9wS5nHK48TlzwAz/6aE5tcd76Bc1ZvAsg0dfOt/ 5zGVWj01eWJvotDvl+Ot7cSiqWEG6QTii47jAOOSuhOulSXb/y+jqEdjv ymSeADKOJzXor8IxGIbSSG1V1PnusJI1GylziXDAfAEeeJjKtvlLQwj4P w==; X-IronPort-AV: E=McAfee;i="6500,9779,10515"; a="395037112" X-IronPort-AV: E=Sophos;i="5.95,225,1661842800"; d="scan'208";a="395037112" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2022 23:23:57 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10515"; a="878392837" X-IronPort-AV: E=Sophos;i="5.95,225,1661842800"; d="scan'208";a="878392837" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2022 23:23:56 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack Subject: [PATCH v10 003/108] KVM: TDX: Add placeholders for TDX VM/vcpu structure Date: Sat, 29 Oct 2022 23:22:04 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Isaku Yamahata Add placeholders TDX VM/vcpu structure that overlays with VMX VM/vcpu structures. Initialize VM structure size and vcpu size/align so that x86 KVM common code knows those size irrespective of VMX or TDX. Those structures will be populated as guest creation logic develops. Add helper functions to check if the VM is guest TD and add conversion functions between KVM VM/VCPU and TDX VM/VCPU. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/main.c | 8 +++--- arch/x86/kvm/vmx/tdx.h | 54 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 3 deletions(-) create mode 100644 arch/x86/kvm/vmx/tdx.h diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index 4c7e71ec3e1d..a7d4af73228e 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -5,6 +5,7 @@ #include "vmx.h" #include "nested.h" #include "pmu.h" +#include "tdx.h" struct kvm_x86_ops vt_x86_ops __initdata = { .name = "kvm_intel", @@ -159,9 +160,10 @@ static int __init vt_init(void) unsigned int vcpu_size, vcpu_align; int r; - vt_x86_ops.vm_size = sizeof(struct kvm_vmx); - vcpu_size = sizeof(struct vcpu_vmx); - vcpu_align = __alignof__(struct vcpu_vmx); + vt_x86_ops.vm_size = max(sizeof(struct kvm_vmx), sizeof(struct kvm_tdx)); + vcpu_size = max(sizeof(struct vcpu_vmx), sizeof(struct vcpu_tdx)); + vcpu_align = max(__alignof__(struct vcpu_vmx), + __alignof__(struct vcpu_tdx)); hv_vp_assist_page_init(); diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h new file mode 100644 index 000000000000..060bf48ec3d6 --- /dev/null +++ b/arch/x86/kvm/vmx/tdx.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __KVM_X86_TDX_H +#define __KVM_X86_TDX_H + +#ifdef CONFIG_INTEL_TDX_HOST +struct kvm_tdx { + struct kvm kvm; + /* TDX specific members follow. */ +}; + +struct vcpu_tdx { + struct kvm_vcpu vcpu; + /* TDX specific members follow. */ +}; + +static inline bool is_td(struct kvm *kvm) +{ + /* + * TDX VM type isn't defined yet. + * return kvm->arch.vm_type == KVM_X86_TDX_VM; + */ + return false; +} + +static inline bool is_td_vcpu(struct kvm_vcpu *vcpu) +{ + return is_td(vcpu->kvm); +} + +static inline struct kvm_tdx *to_kvm_tdx(struct kvm *kvm) +{ + return container_of(kvm, struct kvm_tdx, kvm); +} + +static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) +{ + return container_of(vcpu, struct vcpu_tdx, vcpu); +} +#else +struct kvm_tdx { + struct kvm kvm; +}; + +struct vcpu_tdx { + struct kvm_vcpu vcpu; +}; + +static inline bool is_td(struct kvm *kvm) { return false; } +static inline bool is_td_vcpu(struct kvm_vcpu *vcpu) { return false; } +static inline struct kvm_tdx *to_kvm_tdx(struct kvm *kvm) { return NULL; } +static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) { return NULL; } +#endif /* CONFIG_INTEL_TDX_HOST */ + +#endif /* __KVM_X86_TDX_H */