From patchwork Mon Jan 22 23:54:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13526533 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C46477E781; Mon, 22 Jan 2024 23:56:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.55.52.120 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967772; cv=none; b=UNzt0CbXJKLzKkH5dXU5r2jX8xhHVExbZLajwFkxjYRYB8gB2cw8I8Aq4MzoLzD0xsGl0cyuiQNGf9ySnxz2ltxuHoCdAEGHth0nF1yVhy+vWaNuc6GiF/1aJwX6KZj4ltsfiSIrUp73UQ9eHJgrCahVsnI90ARYhsS8S1MG1dQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967772; c=relaxed/simple; bh=14Wbeybu5eSjKa2ZVC82lKAgAKBXTRsyMhsmAKr3Hcs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hsDoF3QH8YKPC8JkFwDUEklkEKdfuCvVUiueBVM+LXmfM1jVTdPj5Q8lYnCO0kuwY71uPcKyAe9Bvax3zoYoRO+7mRIfOWtOYxDWFGUBs0I9Yc9fJsEWykEtlTFixFfacQkcBW26cDigKP9WezTu2MXGIEsWhovGugbQ2LketvE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hIrY2jD2; arc=none smtp.client-ip=192.55.52.120 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hIrY2jD2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705967770; x=1737503770; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=14Wbeybu5eSjKa2ZVC82lKAgAKBXTRsyMhsmAKr3Hcs=; b=hIrY2jD2816/QrAlGIHIufK/gBcnGKkEgL4m9zgYh+h3etdZHZdM7qtr Bm11pkaUKWsGHvFFU12ZOG73ltA6KXOBzRSL+vIWFXGDLSS9IdxU+SoMb mi2LLIx7Q2PaKIB0ib6mPyAStIYcaxzEDbrfhQJtzGfWJoOs2/sNHAqTD oeF/LsgsAQh0RNbq0/aTvkoi5OrpyzCx5x2eTtL1TsWPPQ+NLAmyd1Zib 1siFhH8OR87EqaP9jMaCXaM0l2gnhdQBJ7cKaAaUE3qkCt0d77xa2r04a 01vjG6RK8l6McDsG+/66/VXB8pJJfnJQ0Rko9NSfsO6XR/AnFjXNEd+bX w==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="400217925" X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="400217925" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="27818017" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:56 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v18 110/121] KVM: TDX: Add methods to ignore VMX preemption timer Date: Mon, 22 Jan 2024 15:54:26 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata TDX doesn't support VMX preemption timer. Implement access methods for VMM to ignore VMX preemption timer. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/main.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index c9f72c383eee..74e5197733ef 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -855,6 +855,27 @@ static void vt_update_cpu_dirty_logging(struct kvm_vcpu *vcpu) vmx_update_cpu_dirty_logging(vcpu); } +#ifdef CONFIG_X86_64 +static int vt_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, + bool *expired) +{ + /* VMX-preemption timer isn't available for TDX. */ + if (is_td_vcpu(vcpu)) + return -EINVAL; + + return vmx_set_hv_timer(vcpu, guest_deadline_tsc, expired); +} + +static void vt_cancel_hv_timer(struct kvm_vcpu *vcpu) +{ + /* VMX-preemption timer can't be set. See vt_set_hv_timer(). */ + if (KVM_BUG_ON(is_td_vcpu(vcpu), vcpu->kvm)) + return; + + vmx_cancel_hv_timer(vcpu); +} +#endif + static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp) { if (!is_td(kvm)) @@ -1006,8 +1027,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .pi_start_assignment = vmx_pi_start_assignment, #ifdef CONFIG_X86_64 - .set_hv_timer = vmx_set_hv_timer, - .cancel_hv_timer = vmx_cancel_hv_timer, + .set_hv_timer = vt_set_hv_timer, + .cancel_hv_timer = vt_cancel_hv_timer, #endif .setup_mce = vmx_setup_mce,