Message ID | 20190426220309.55654-1-jeremy.linton@arm.com (mailing list archive) |
---|---|
Headers | show |
Series | arm64: SPE ACPI enablement | expand |
Hi Jeremy, On Fri, Apr 26, 2019 at 05:03:04PM -0500, Jeremy Linton wrote: > This patch series enables the Arm Statistical Profiling > Extension (SPE) on ACPI platforms. > > This is possible because ACPI 6.3 uses a previously > reserved field in the MADT to store the SPE interrupt > number, similarly to how the normal PMU is described. > If a consistent valid interrupt exists across all the > cores in the system, a platform device is registered. > That then triggers the SPE module, which runs as normal. > > This version also adds the ability to parse the PPTT for > IDENTICAL cores. We then use this to sanity check the > single SPE device we create. This creates a bit of a > problem with respect to the specification though. The > specification says that its legal for multiple tree's > to exist in the PPTT. We handle this fine, but what > happens in the case of multiple tree's is that the lack > of a common node with IDENTICAL set forces us to assume > that there are multiple non IDENTICAL cores in the > machine. This looks good to me. Please can you respin, addressing Raphael's outstanding concerns on the third patch? Will