mbox series

[v5,0/3] PCI/ACPI: add support for CXL _OSC

Message ID 20220406023746.2807328-1-vishal.l.verma@intel.com (mailing list archive)
Headers show
Series PCI/ACPI: add support for CXL _OSC | expand

Message

Verma, Vishal L April 6, 2022, 2:37 a.m. UTC
Changes since v4[1]:
- Collect an ack for patch 1 (Rafael)
- Fix commit subject wording in patch 2 (Rafael)
- Fix a debug print in patch 2 (Rafael)
- Document the reasoning behind calculation of cxl hotplug support (David)
- A few definition and variable name changes to make the new _OSC DWORDS
  generic instead of CXL specific (Rafael)

Add support for using the CXL definition of _OSC where applicable, and
negotiating CXL specific support and control bits.

Patch 1 is a preliminary cleanup that replaces open-coded pointer
arithmetic to retrieve the Control DWORD with an inline helper.

Patch 2 adds the new CXL _OSC UUID, and uses it instead of the PCI UUID
when a root port is CXL enabled. It provides a fallback method for
CXL-1.1 platforms that may not implement the CXL-2.0 _OSC.

Patch 3 performs negotiation for the CXL specific _OSC support and
control bits.

I've tested these against a custom qemu[2], which adds the CXL _OSC (in
addition to other CXL support). Specifically, _OSC support is added
here[3].

[1]: https://lore.kernel.org/linux-cxl/20220331202022.1823174-1-vishal.l.verma@intel.com
[2]: https://gitlab.com/jic23/qemu/-/tree/cxl-v8-draft
[3]: https://gitlab.com/jic23/qemu/-/commit/1d67df6b6e3716c27462873f3451956f5c0673a3

Dan Williams (1):
  PCI/ACPI: Prefer CXL _OSC instead of PCIe _OSC for CXL host bridges

Vishal Verma (2):
  PCI/ACPI: add a helper for retrieving _OSC Control DWORDs
  PCI/ACPI: negotiate CXL _OSC

 include/linux/acpi.h    |  42 ++++++-
 include/acpi/acpi_bus.h |  12 +-
 drivers/acpi/bus.c      |   2 +-
 drivers/acpi/pci_root.c | 240 +++++++++++++++++++++++++++++++++++-----
 4 files changed, 262 insertions(+), 34 deletions(-)


base-commit: 05e815539f3f161585c13a9ab023341bade2c52f

Comments

Davidlohr Bueso April 8, 2022, 3:22 p.m. UTC | #1
On Tue, 05 Apr 2022, Vishal Verma wrote:

>Changes since v4[1]:
>- Collect an ack for patch 1 (Rafael)
>- Fix commit subject wording in patch 2 (Rafael)
>- Fix a debug print in patch 2 (Rafael)
>- Document the reasoning behind calculation of cxl hotplug support (David)
>- A few definition and variable name changes to make the new _OSC DWORDS
>  generic instead of CXL specific (Rafael)
>
>Add support for using the CXL definition of _OSC where applicable, and
>negotiating CXL specific support and control bits.
>
>Patch 1 is a preliminary cleanup that replaces open-coded pointer
>arithmetic to retrieve the Control DWORD with an inline helper.
>
>Patch 2 adds the new CXL _OSC UUID, and uses it instead of the PCI UUID
>when a root port is CXL enabled. It provides a fallback method for
>CXL-1.1 platforms that may not implement the CXL-2.0 _OSC.
>
>Patch 3 performs negotiation for the CXL specific _OSC support and
>control bits.
>
>I've tested these against a custom qemu[2], which adds the CXL _OSC (in
>addition to other CXL support). Specifically, _OSC support is added
>here[3].

For the series, feel free to add my:

Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>