Show patches with: Series = CXL Port Enumeration and Plans for v5.14       |   8 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[8/8] cxl/acpi: Add module parameters to stand in for ACPI tables CXL Port Enumeration and Plans for v5.14 - - - --- 2021-05-07 Dan Williams Superseded
[7/8] cxl/port: Introduce cxl_port objects CXL Port Enumeration and Plans for v5.14 - 1 - --- 2021-05-07 Dan Williams Superseded
[6/8] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS CXL Port Enumeration and Plans for v5.14 2 - - --- 2021-05-07 Dan Williams Superseded
[5/8] cxl/acpi: Introduce ACPI0017 driver and cxl_root CXL Port Enumeration and Plans for v5.14 - - - --- 2021-05-07 Dan Williams Superseded
[4/8] cxl/core: Refactor CXL register lookup for bridge reuse CXL Port Enumeration and Plans for v5.14 - 2 - --- 2021-05-07 Dan Williams Superseded
[3/8] cxl/core: Rename bus.c to core.c CXL Port Enumeration and Plans for v5.14 1 1 - --- 2021-05-07 Dan Williams Superseded
[2/8] cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices CXL Port Enumeration and Plans for v5.14 - 2 - --- 2021-05-07 Dan Williams Superseded
[1/8] cxl/mem: Move some definitions to mem.h CXL Port Enumeration and Plans for v5.14 - 2 - --- 2021-05-07 Dan Williams Superseded