From patchwork Wed Dec 16 12:42:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jayachandran C." X-Patchwork-Id: 7861041 Return-Path: X-Original-To: patchwork-linux-acpi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4C7C9BEEE1 for ; Wed, 16 Dec 2015 12:20:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 594F1203B8 for ; Wed, 16 Dec 2015 12:20:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3F1C22038E for ; Wed, 16 Dec 2015 12:20:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933045AbbLPMUi (ORCPT ); Wed, 16 Dec 2015 07:20:38 -0500 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:55373 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932681AbbLPMUh (ORCPT ); Wed, 16 Dec 2015 07:20:37 -0500 X-IronPort-AV: E=Sophos;i="5.20,436,1444719600"; d="scan'208";a="83563668" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 16 Dec 2015 04:57:27 -0800 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.235.1; Wed, 16 Dec 2015 04:20:36 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.235.1; Wed, 16 Dec 2015 04:20:36 -0800 Received: from netl-snoppy.ban.broadcom.com (unknown [10.132.128.129]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 515ED40FE6; Wed, 16 Dec 2015 04:17:03 -0800 (PST) From: Jayachandran C To: , Bjorn Helgaas , , Arnd Bergmann , CC: Jayachandran C , Lorenzo Pieralisi , Tomasz Nowicki Subject: [RFC PATCH v3 2/5] arm64: pci: Add ACPI support Date: Wed, 16 Dec 2015 18:12:32 +0530 Message-ID: <1450269755-21420-3-git-send-email-jchandra@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1450269755-21420-1-git-send-email-jchandra@broadcom.com> References: <1450269755-21420-1-git-send-email-jchandra@broadcom.com> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add functions needed for ACPI support. pci_acpi_scan_root(struct acpi_pci_root *root) is marked as weak so that it can be implemented by the generic acpi pci driver. pcibios_root_bridge_prepare is defined and it assumes that the sysdata is struct acpi_pci_root_info. pcibios_enable_device and pcibios_disable_device handle acpi irq enable and disable. And, pcibios_add_bus and pcibios_remove_bus have been added call the corresponding ACPI functions. Signed-off-by: Jayachandran C --- arch/arm64/Kconfig | 3 +++ arch/arm64/kernel/pci.c | 65 ++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 62 insertions(+), 6 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 871f217..8c93af2 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -203,6 +203,9 @@ config PCI_DOMAINS_GENERIC config PCI_SYSCALL def_bool PCI +config PCI_MMCONFIG + def_bool PCI && ACPI + source "drivers/pci/Kconfig" source "drivers/pci/pcie/Kconfig" source "drivers/pci/hotplug/Kconfig" diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index b3d098b..403c804 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -48,9 +49,22 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) if (pci_has_flag(PCI_PROBE_ONLY)) return 0; +#ifdef CONFIG_ACPI + if (acpi_find_root_bridge_handle(dev)) + acpi_pci_irq_enable(dev); +#endif + return pci_enable_resources(dev, mask); } +void pcibios_disable_device(struct pci_dev *dev) +{ +#ifdef CONFIG_ACPI + if (acpi_find_root_bridge_handle(dev)) + acpi_pci_irq_disable(dev); +#endif +} + /* * Try to assign the IRQ number from DT when adding a new device */ @@ -62,25 +76,64 @@ int pcibios_add_device(struct pci_dev *dev) } /* - * raw_pci_read/write - Platform-specific PCI config space access. + * ACPI uses these - leave it to the generic ACPI PCI driver */ -int raw_pci_read(unsigned int domain, unsigned int bus, +int __weak raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 *val) { return -ENXIO; } -int raw_pci_write(unsigned int domain, unsigned int bus, +int __weak raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 val) { return -ENXIO; } #ifdef CONFIG_ACPI -/* Root bridge scanning */ -struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) + +void pcibios_add_bus(struct pci_bus *bus) +{ + acpi_pci_add_bus(bus); +} + +void pcibios_remove_bus(struct pci_bus *bus) +{ + acpi_pci_remove_bus(bus); +} + +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +{ + /* ACPI root bus is created with NULL parent */ + if (!acpi_disabled && bridge->dev.parent == NULL) { + struct pci_bus *b = bridge->bus; + struct acpi_pci_root_info *ci = b->sysdata; + + ACPI_COMPANION_SET(&bridge->dev, ci->bridge); + b->domain_nr = ci->root->segment; + } + return 0; +} + +/* + * Provide weak implementations of ACPI PCI hooks needed. + * Leave it to the ACPI PCI driver implementation to do it + */ +struct pci_bus *__weak pci_acpi_scan_root(struct acpi_pci_root *root) { - /* TODO: Should be revisited when implementing PCI on ACPI */ return NULL; } + +void __init __weak pci_mmcfg_late_init(void) +{ +} + +static int __init pcibios_assign_resources(void) +{ + pci_assign_unassigned_resources(); + return 0; +} + +fs_initcall(pcibios_assign_resources); + #endif