diff mbox

[RFC,1/3] pci, acpi: Match PCI config space accessors against platfrom specific ECAM quirks.

Message ID 1464856864-18049-2-git-send-email-tn@semihalf.com (mailing list archive)
State RFC, archived
Headers show

Commit Message

Tomasz Nowicki June 2, 2016, 8:41 a.m. UTC
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite accessors
set. Algorithm traverses available quirk list, matches against
<oem_id, oem_rev, domain, bus number> tuple and returns corresponding
PCI config ops. oem_id and oem_rev come from MCFG table standard header.
All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and
kept self contained. Example:

/* Custom PCI config ops */
static struct pci_generic_ecam_ops foo_pci_ops = {
	.bus_shift	= 24,
	.pci_ops = {
		.map_bus = pci_ecam_map_bus,
		.read = foo_ecam_config_read,
		.write = foo_ecam_config_write,
	}
};

DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_rev>, <domain_nr>, <bus_nr>);

Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
 drivers/acpi/pci_mcfg.c           | 32 ++++++++++++++++++++++++++++++++
 include/asm-generic/vmlinux.lds.h |  7 +++++++
 include/linux/pci-acpi.h          | 19 +++++++++++++++++++
 3 files changed, 58 insertions(+)

Comments

Arnd Bergmann June 2, 2016, 11:42 a.m. UTC | #1
On Thursday, June 2, 2016 10:41:01 AM CEST Tomasz Nowicki wrote:
> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
> +{
> +       int bus_num = root->secondary.start;
> +       int domain = root->segment;
> +       struct pci_cfg_fixup *f;
> +
> +       if (!mcfg_table)
> +               return &pci_generic_ecam_ops;
> +
> +       /*
> +        * Match against platform specific quirks and return corresponding
> +        * CAM ops.
> +        *
> +        * First match against PCI topology <domain:bus> then use OEM ID and
> +        * OEM revision from MCFG table standard header.
> +        */
> +       for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
> +               if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
> +                   (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
> +                   (!strncmp(f->oem_id, mcfg_table->header.oem_id,
> +                             ACPI_OEM_ID_SIZE)) &&
> +                   (f->oem_revision == mcfg_table->header.oem_revision))
> +                       return f->ops;
> +       }
> +       /* No quirks, use ECAM */
> +       return &pci_generic_ecam_ops;
> +}
> +
>  int pci_mcfg_lookup(struct acpi_pci_root *root)

Can you explain the use of pci_ecam_ops instead of pci_ops here?

I was hoping we'd be able to fold all of pci-ecam code into the
generic PCI layer at some point and get rid of pci_ecam_ops in the
process.

	Arnd
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Tomasz Nowicki June 2, 2016, 12:07 p.m. UTC | #2
On 02.06.2016 13:42, Arnd Bergmann wrote:
> On Thursday, June 2, 2016 10:41:01 AM CEST Tomasz Nowicki wrote:
>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
>> +{
>> +       int bus_num = root->secondary.start;
>> +       int domain = root->segment;
>> +       struct pci_cfg_fixup *f;
>> +
>> +       if (!mcfg_table)
>> +               return &pci_generic_ecam_ops;
>> +
>> +       /*
>> +        * Match against platform specific quirks and return corresponding
>> +        * CAM ops.
>> +        *
>> +        * First match against PCI topology <domain:bus> then use OEM ID and
>> +        * OEM revision from MCFG table standard header.
>> +        */
>> +       for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
>> +               if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
>> +                   (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
>> +                   (!strncmp(f->oem_id, mcfg_table->header.oem_id,
>> +                             ACPI_OEM_ID_SIZE)) &&
>> +                   (f->oem_revision == mcfg_table->header.oem_revision))
>> +                       return f->ops;
>> +       }
>> +       /* No quirks, use ECAM */
>> +       return &pci_generic_ecam_ops;
>> +}
>> +
>>   int pci_mcfg_lookup(struct acpi_pci_root *root)
>
> Can you explain the use of pci_ecam_ops instead of pci_ops here?
>

I wanted to get associated bus_shift and use it to setup configuration 
region properly before calling pci_ecam_create. Please see next patch.

Thanks,
Tomasz
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Arnd Bergmann June 2, 2016, 12:32 p.m. UTC | #3
On Thursday, June 2, 2016 2:07:43 PM CEST Tomasz Nowicki wrote:
> On 02.06.2016 13:42, Arnd Bergmann wrote:
> > On Thursday, June 2, 2016 10:41:01 AM CEST Tomasz Nowicki wrote:
> >> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
> >> +{
> >> +       int bus_num = root->secondary.start;
> >> +       int domain = root->segment;
> >> +       struct pci_cfg_fixup *f;
> >> +
> >> +       if (!mcfg_table)
> >> +               return &pci_generic_ecam_ops;
> >> +
> >> +       /*
> >> +        * Match against platform specific quirks and return corresponding
> >> +        * CAM ops.
> >> +        *
> >> +        * First match against PCI topology <domain:bus> then use OEM ID and
> >> +        * OEM revision from MCFG table standard header.
> >> +        */
> >> +       for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
> >> +               if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
> >> +                   (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
> >> +                   (!strncmp(f->oem_id, mcfg_table->header.oem_id,
> >> +                             ACPI_OEM_ID_SIZE)) &&
> >> +                   (f->oem_revision == mcfg_table->header.oem_revision))
> >> +                       return f->ops;
> >> +       }
> >> +       /* No quirks, use ECAM */
> >> +       return &pci_generic_ecam_ops;
> >> +}
> >> +
> >>   int pci_mcfg_lookup(struct acpi_pci_root *root)
> >
> > Can you explain the use of pci_ecam_ops instead of pci_ops here?
> >
> 
> I wanted to get associated bus_shift and use it to setup configuration 
> region properly before calling pci_ecam_create. Please see next patch.
> 

I see. It feels really odd to do it this way though, since having a
nonstandard bus_shift essentially means not using anything resembling
ECAM to start with.

I realize that a lot of the host bridges are not ECAM, but because
of this, it would be more logical to have their own pci_ops instead
of pci_ecam_ops.

	Arnd

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Tomasz Nowicki June 2, 2016, 1:35 p.m. UTC | #4
On 02.06.2016 14:32, Arnd Bergmann wrote:
> On Thursday, June 2, 2016 2:07:43 PM CEST Tomasz Nowicki wrote:
>> On 02.06.2016 13:42, Arnd Bergmann wrote:
>>> On Thursday, June 2, 2016 10:41:01 AM CEST Tomasz Nowicki wrote:
>>>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
>>>> +{
>>>> +       int bus_num = root->secondary.start;
>>>> +       int domain = root->segment;
>>>> +       struct pci_cfg_fixup *f;
>>>> +
>>>> +       if (!mcfg_table)
>>>> +               return &pci_generic_ecam_ops;
>>>> +
>>>> +       /*
>>>> +        * Match against platform specific quirks and return corresponding
>>>> +        * CAM ops.
>>>> +        *
>>>> +        * First match against PCI topology <domain:bus> then use OEM ID and
>>>> +        * OEM revision from MCFG table standard header.
>>>> +        */
>>>> +       for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
>>>> +               if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
>>>> +                   (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
>>>> +                   (!strncmp(f->oem_id, mcfg_table->header.oem_id,
>>>> +                             ACPI_OEM_ID_SIZE)) &&
>>>> +                   (f->oem_revision == mcfg_table->header.oem_revision))
>>>> +                       return f->ops;
>>>> +       }
>>>> +       /* No quirks, use ECAM */
>>>> +       return &pci_generic_ecam_ops;
>>>> +}
>>>> +
>>>>    int pci_mcfg_lookup(struct acpi_pci_root *root)
>>>
>>> Can you explain the use of pci_ecam_ops instead of pci_ops here?
>>>
>>
>> I wanted to get associated bus_shift and use it to setup configuration
>> region properly before calling pci_ecam_create. Please see next patch.
>>
>
> I see. It feels really odd to do it this way though, since having a
> nonstandard bus_shift essentially means not using anything resembling
> ECAM to start with.
>
> I realize that a lot of the host bridges are not ECAM, but because
> of this, it would be more logical to have their own pci_ops instead
> of pci_ecam_ops.

Well, we have bus_shift there to express bus shift differentiation. So I 
would say we should change just structure name to prevent misunderstanding.

Thanks,
Tomasz
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Arnd Bergmann June 2, 2016, 3:19 p.m. UTC | #5
On Thursday, June 2, 2016 3:35:34 PM CEST Tomasz Nowicki wrote:
> On 02.06.2016 14:32, Arnd Bergmann wrote:
> > On Thursday, June 2, 2016 2:07:43 PM CEST Tomasz Nowicki wrote:
> >> On 02.06.2016 13:42, Arnd Bergmann wrote:
> >>> On Thursday, June 2, 2016 10:41:01 AM CEST Tomasz Nowicki wrote:
> >>>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
> >>>> +{
> >>>> +       int bus_num = root->secondary.start;
> >>>> +       int domain = root->segment;
> >>>> +       struct pci_cfg_fixup *f;
> >>>> +
> >>>> +       if (!mcfg_table)
> >>>> +               return &pci_generic_ecam_ops;
> >>>> +
> >>>> +       /*
> >>>> +        * Match against platform specific quirks and return corresponding
> >>>> +        * CAM ops.
> >>>> +        *
> >>>> +        * First match against PCI topology <domain:bus> then use OEM ID and
> >>>> +        * OEM revision from MCFG table standard header.
> >>>> +        */
> >>>> +       for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
> >>>> +               if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
> >>>> +                   (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
> >>>> +                   (!strncmp(f->oem_id, mcfg_table->header.oem_id,
> >>>> +                             ACPI_OEM_ID_SIZE)) &&
> >>>> +                   (f->oem_revision == mcfg_table->header.oem_revision))
> >>>> +                       return f->ops;
> >>>> +       }
> >>>> +       /* No quirks, use ECAM */
> >>>> +       return &pci_generic_ecam_ops;
> >>>> +}
> >>>> +
> >>>>    int pci_mcfg_lookup(struct acpi_pci_root *root)
> >>>
> >>> Can you explain the use of pci_ecam_ops instead of pci_ops here?
> >>>
> >>
> >> I wanted to get associated bus_shift and use it to setup configuration
> >> region properly before calling pci_ecam_create. Please see next patch.
> >>
> >
> > I see. It feels really odd to do it this way though, since having a
> > nonstandard bus_shift essentially means not using anything resembling
> > ECAM to start with.
> >
> > I realize that a lot of the host bridges are not ECAM, but because
> > of this, it would be more logical to have their own pci_ops instead
> > of pci_ecam_ops.
> 
> Well, we have bus_shift there to express bus shift differentiation. So I 
> would say we should change just structure name to prevent misunderstanding.

I'm not really convinced here. We use the bus_shift for two
completely different things in the end: for sizing the MMIO window
that gets mapped by ACPI and for the pci_ecam_map_bus() function
that isn't actually used for the typical fixups that override the
pci_ops.

I see now that this sneaks in an .init callback for the quirk
through the backdoor, by adding it to the pci_ecam_ops. I think
that is not good: if the idea is to have the config space access
be adapted to various quirks that is one thing, but if we actually
need a function to be called for the quirk we should do just that
and have it be obvious. That function can then override the
pci_ops.

	Arnd
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Christopher Covington June 3, 2016, 3:15 p.m. UTC | #6
Hi Tomasz,

Thanks for your work on this.

On 06/02/2016 04:41 AM, Tomasz Nowicki wrote:
> Some platforms may not be fully compliant with generic set of PCI config
> accessors. For these cases we implement the way to overwrite accessors
> set. Algorithm traverses available quirk list, matches against
> <oem_id, oem_rev, domain, bus number> tuple and returns corresponding
> PCI config ops. oem_id and oem_rev come from MCFG table standard header.
> All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and
> kept self contained. Example:
> 
> /* Custom PCI config ops */
> static struct pci_generic_ecam_ops foo_pci_ops = {
> 	.bus_shift	= 24,
> 	.pci_ops = {
> 		.map_bus = pci_ecam_map_bus,
> 		.read = foo_ecam_config_read,
> 		.write = foo_ecam_config_write,
> 	}
> };
> 
> DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_rev>, <domain_nr>, <bus_nr>);
> 
> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
> ---
>  drivers/acpi/pci_mcfg.c           | 32 ++++++++++++++++++++++++++++++++
>  include/asm-generic/vmlinux.lds.h |  7 +++++++
>  include/linux/pci-acpi.h          | 19 +++++++++++++++++++
>  3 files changed, 58 insertions(+)
> 
> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> index 1847f74..f3d4570 100644
> --- a/drivers/acpi/pci_mcfg.c
> +++ b/drivers/acpi/pci_mcfg.c
> @@ -22,11 +22,43 @@
>  #include <linux/kernel.h>
>  #include <linux/pci.h>
>  #include <linux/pci-acpi.h>
> +#include <linux/pci-ecam.h>
>  
>  /* Root pointer to the mapped MCFG table */
>  static struct acpi_table_mcfg *mcfg_table;
>  static int mcfg_entries;
>  
> +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
> +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
> +
> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
> +{
> +	int bus_num = root->secondary.start;
> +	int domain = root->segment;
> +	struct pci_cfg_fixup *f;
> +
> +	if (!mcfg_table)
> +		return &pci_generic_ecam_ops;
> +
> +	/*
> +	 * Match against platform specific quirks and return corresponding
> +	 * CAM ops.
> +	 *
> +	 * First match against PCI topology <domain:bus> then use OEM ID and
> +	 * OEM revision from MCFG table standard header.
> +	 */
> +	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
> +		if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
> +		    (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
> +		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
> +			      ACPI_OEM_ID_SIZE)) &&
> +		    (f->oem_revision == mcfg_table->header.oem_revision))

Is this more likely to be updated between quirky and fixed platforms
than oem_table_id? What do folks think about using oem_table_id instead
of, or in addition to, oem_revision?

In case these details are helpful, here was my simple prototype of an
MCFG based approach:

https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-rc1-testing&id=c5d8bc49a198fd8f61f82c7d8f169564d6176b07
https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-rc1-testing&id=50bfe77ccd1639e6ce8c7c4fcca187d50e0bead4

Thanks,
Cov
Gabriele Paoloni June 3, 2016, 3:32 p.m. UTC | #7
Hi Cov

> -----Original Message-----
> From: linux-pci-owner@vger.kernel.org [mailto:linux-pci-
> owner@vger.kernel.org] On Behalf Of Christopher Covington
> Sent: 03 June 2016 16:15
> To: Tomasz Nowicki; helgaas@kernel.org; arnd@arndb.de;
> will.deacon@arm.com; catalin.marinas@arm.com; rafael@kernel.org;
> hanjun.guo@linaro.org; Lorenzo.Pieralisi@arm.com; okaya@codeaurora.org;
> jchandra@broadcom.com
> Cc: jcm@redhat.com; linaro-acpi@lists.linaro.org; linux-
> pci@vger.kernel.org; dhdang@apm.com; Liviu.Dudau@arm.com;
> ddaney@caviumnetworks.com; jeremy.linton@arm.com; linux-
> kernel@vger.kernel.org; linux-acpi@vger.kernel.org;
> robert.richter@caviumnetworks.com; Suravee.Suthikulpanit@amd.com;
> msalter@redhat.com; Wangyijing; mw@semihalf.com;
> andrea.gallo@linaro.org; linux-arm-kernel@lists.infradead.org;
> liudongdong (C); Gabriele Paoloni
> Subject: Re: [RFC PATCH 1/3] pci, acpi: Match PCI config space
> accessors against platfrom specific ECAM quirks.
> 
> Hi Tomasz,
> 
> Thanks for your work on this.
> 
> On 06/02/2016 04:41 AM, Tomasz Nowicki wrote:
> > Some platforms may not be fully compliant with generic set of PCI
> config
> > accessors. For these cases we implement the way to overwrite
> accessors
> > set. Algorithm traverses available quirk list, matches against
> > <oem_id, oem_rev, domain, bus number> tuple and returns corresponding
> > PCI config ops. oem_id and oem_rev come from MCFG table standard
> header.
> > All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and
> > kept self contained. Example:
> >
> > /* Custom PCI config ops */
> > static struct pci_generic_ecam_ops foo_pci_ops = {
> > 	.bus_shift	= 24,
> > 	.pci_ops = {
> > 		.map_bus = pci_ecam_map_bus,
> > 		.read = foo_ecam_config_read,
> > 		.write = foo_ecam_config_write,
> > 	}
> > };
> >
> > DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_rev>,
> <domain_nr>, <bus_nr>);
> >
> > Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
> > ---
> >  drivers/acpi/pci_mcfg.c           | 32
> ++++++++++++++++++++++++++++++++
> >  include/asm-generic/vmlinux.lds.h |  7 +++++++
> >  include/linux/pci-acpi.h          | 19 +++++++++++++++++++
> >  3 files changed, 58 insertions(+)
> >
> > diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> > index 1847f74..f3d4570 100644
> > --- a/drivers/acpi/pci_mcfg.c
> > +++ b/drivers/acpi/pci_mcfg.c
> > @@ -22,11 +22,43 @@
> >  #include <linux/kernel.h>
> >  #include <linux/pci.h>
> >  #include <linux/pci-acpi.h>
> > +#include <linux/pci-ecam.h>
> >
> >  /* Root pointer to the mapped MCFG table */
> >  static struct acpi_table_mcfg *mcfg_table;
> >  static int mcfg_entries;
> >
> > +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
> > +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
> > +
> > +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
> > +{
> > +	int bus_num = root->secondary.start;
> > +	int domain = root->segment;
> > +	struct pci_cfg_fixup *f;
> > +
> > +	if (!mcfg_table)
> > +		return &pci_generic_ecam_ops;
> > +
> > +	/*
> > +	 * Match against platform specific quirks and return
> corresponding
> > +	 * CAM ops.
> > +	 *
> > +	 * First match against PCI topology <domain:bus> then use OEM ID
> and
> > +	 * OEM revision from MCFG table standard header.
> > +	 */
> > +	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups;
> f++) {
> > +		if ((f->domain == domain || f->domain ==
> PCI_MCFG_DOMAIN_ANY) &&
> > +		    (f->bus_num == bus_num || f->bus_num ==
> PCI_MCFG_BUS_ANY) &&
> > +		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
> > +			      ACPI_OEM_ID_SIZE)) &&
> > +		    (f->oem_revision == mcfg_table->header.oem_revision))
> 
> Is this more likely to be updated between quirky and fixed platforms
> than oem_table_id? What do folks think about using oem_table_id instead
> of, or in addition to, oem_revision?

From my understanding we need to stick to this mechanism as (otherwise)
there are platforms out in the field that would need a FW update.

So I don't think that using oem_table_id "instead" is possible; about
"in addition" I think it is doable, but I do not see the advantage much.
I mean that if a platform gets fixed the oem revision should change too,
Right?   

Thanks

Gab

> 
> In case these details are helpful, here was my simple prototype of an
> MCFG based approach:
> 
> https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-rc1-
> testing&id=c5d8bc49a198fd8f61f82c7d8f169564d6176b07
> https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-rc1-
> testing&id=50bfe77ccd1639e6ce8c7c4fcca187d50e0bead4
> 
> Thanks,
> Cov
> 
> --
> Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
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David Daney June 3, 2016, 4:57 p.m. UTC | #8
On 06/03/2016 08:32 AM, Gabriele Paoloni wrote:
[...]
>>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
>>> +{
>>> +	int bus_num = root->secondary.start;
>>> +	int domain = root->segment;
>>> +	struct pci_cfg_fixup *f;
>>> +
>>> +	if (!mcfg_table)
>>> +		return &pci_generic_ecam_ops;
>>> +
>>> +	/*
>>> +	 * Match against platform specific quirks and return
>> corresponding
>>> +	 * CAM ops.
>>> +	 *
>>> +	 * First match against PCI topology <domain:bus> then use OEM ID
>> and
>>> +	 * OEM revision from MCFG table standard header.
>>> +	 */
>>> +	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups;
>> f++) {
>>> +		if ((f->domain == domain || f->domain ==
>> PCI_MCFG_DOMAIN_ANY) &&
>>> +		    (f->bus_num == bus_num || f->bus_num ==
>> PCI_MCFG_BUS_ANY) &&
>>> +		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
>>> +			      ACPI_OEM_ID_SIZE)) &&
>>> +		    (f->oem_revision == mcfg_table->header.oem_revision))
>>
>> Is this more likely to be updated between quirky and fixed platforms
>> than oem_table_id? What do folks think about using oem_table_id instead
>> of, or in addition to, oem_revision?
>
>  From my understanding we need to stick to this mechanism as (otherwise)
> there are platforms out in the field that would need a FW update.
>
> So I don't think that using oem_table_id "instead" is possible; about
> "in addition" I think it is doable, but I do not see the advantage much.
> I mean that if a platform gets fixed the oem revision should change too,
> Right?

I think you are correct.  My take away on discussions about using this 
style of quirk matching was that we would require the oem_revision to 
change as different quirks (or lack of quirks) were required.

David Daney


>
> Thanks
>
> Gab
>

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Jeffrey Hugo June 3, 2016, 4:59 p.m. UTC | #9
On 6/3/2016 9:32 AM, Gabriele Paoloni wrote:
> Hi Cov
>
>> -----Original Message-----
>> From: linux-pci-owner@vger.kernel.org [mailto:linux-pci-
>> owner@vger.kernel.org] On Behalf Of Christopher Covington
>> Sent: 03 June 2016 16:15
>> To: Tomasz Nowicki; helgaas@kernel.org; arnd@arndb.de;
>> will.deacon@arm.com; catalin.marinas@arm.com; rafael@kernel.org;
>> hanjun.guo@linaro.org; Lorenzo.Pieralisi@arm.com; okaya@codeaurora.org;
>> jchandra@broadcom.com
>> Cc: jcm@redhat.com; linaro-acpi@lists.linaro.org; linux-
>> pci@vger.kernel.org; dhdang@apm.com; Liviu.Dudau@arm.com;
>> ddaney@caviumnetworks.com; jeremy.linton@arm.com; linux-
>> kernel@vger.kernel.org; linux-acpi@vger.kernel.org;
>> robert.richter@caviumnetworks.com; Suravee.Suthikulpanit@amd.com;
>> msalter@redhat.com; Wangyijing; mw@semihalf.com;
>> andrea.gallo@linaro.org; linux-arm-kernel@lists.infradead.org;
>> liudongdong (C); Gabriele Paoloni
>> Subject: Re: [RFC PATCH 1/3] pci, acpi: Match PCI config space
>> accessors against platfrom specific ECAM quirks.
>>
>> Hi Tomasz,
>>
>> Thanks for your work on this.
>>
>> On 06/02/2016 04:41 AM, Tomasz Nowicki wrote:
>>> Some platforms may not be fully compliant with generic set of PCI
>> config
>>> accessors. For these cases we implement the way to overwrite
>> accessors
>>> set. Algorithm traverses available quirk list, matches against
>>> <oem_id, oem_rev, domain, bus number> tuple and returns corresponding
>>> PCI config ops. oem_id and oem_rev come from MCFG table standard
>> header.
>>> All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and
>>> kept self contained. Example:
>>>
>>> /* Custom PCI config ops */
>>> static struct pci_generic_ecam_ops foo_pci_ops = {
>>> 	.bus_shift	= 24,
>>> 	.pci_ops = {
>>> 		.map_bus = pci_ecam_map_bus,
>>> 		.read = foo_ecam_config_read,
>>> 		.write = foo_ecam_config_write,
>>> 	}
>>> };
>>>
>>> DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_rev>,
>> <domain_nr>, <bus_nr>);
>>>
>>> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
>>> ---
>>>  drivers/acpi/pci_mcfg.c           | 32
>> ++++++++++++++++++++++++++++++++
>>>  include/asm-generic/vmlinux.lds.h |  7 +++++++
>>>  include/linux/pci-acpi.h          | 19 +++++++++++++++++++
>>>  3 files changed, 58 insertions(+)
>>>
>>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>>> index 1847f74..f3d4570 100644
>>> --- a/drivers/acpi/pci_mcfg.c
>>> +++ b/drivers/acpi/pci_mcfg.c
>>> @@ -22,11 +22,43 @@
>>>  #include <linux/kernel.h>
>>>  #include <linux/pci.h>
>>>  #include <linux/pci-acpi.h>
>>> +#include <linux/pci-ecam.h>
>>>
>>>  /* Root pointer to the mapped MCFG table */
>>>  static struct acpi_table_mcfg *mcfg_table;
>>>  static int mcfg_entries;
>>>
>>> +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
>>> +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
>>> +
>>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
>>> +{
>>> +	int bus_num = root->secondary.start;
>>> +	int domain = root->segment;
>>> +	struct pci_cfg_fixup *f;
>>> +
>>> +	if (!mcfg_table)
>>> +		return &pci_generic_ecam_ops;
>>> +
>>> +	/*
>>> +	 * Match against platform specific quirks and return
>> corresponding
>>> +	 * CAM ops.
>>> +	 *
>>> +	 * First match against PCI topology <domain:bus> then use OEM ID
>> and
>>> +	 * OEM revision from MCFG table standard header.
>>> +	 */
>>> +	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups;
>> f++) {
>>> +		if ((f->domain == domain || f->domain ==
>> PCI_MCFG_DOMAIN_ANY) &&
>>> +		    (f->bus_num == bus_num || f->bus_num ==
>> PCI_MCFG_BUS_ANY) &&
>>> +		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
>>> +			      ACPI_OEM_ID_SIZE)) &&
>>> +		    (f->oem_revision == mcfg_table->header.oem_revision))
>>
>> Is this more likely to be updated between quirky and fixed platforms
>> than oem_table_id? What do folks think about using oem_table_id instead
>> of, or in addition to, oem_revision?
>
> From my understanding we need to stick to this mechanism as (otherwise)
> there are platforms out in the field that would need a FW update.
>
> So I don't think that using oem_table_id "instead" is possible; about
> "in addition" I think it is doable, but I do not see the advantage much.
> I mean that if a platform gets fixed the oem revision should change too,
> Right?

Cov and I had a discussion about this, so hopefully I can bring a 
slightly different perspective that will make sense.

We forsee a situation where we have platform A that needs a quirk, and 
platform B that does not.  The OEM id is the same for both platforms as 
they are different platforms from the same OEM.  Using the OEM revision 
field does not seem to be appropriate since these are different 
platforms and the revision field appears to be for the purpose of 
tracking differences within a single platform.  Therefore, Cov is 
proposing using the OEM table id as a mechanism to distinguish platform 
A (needs quirk applied) vs platform B (no quirks) from the same OEM.

>
> Thanks
>
> Gab
>
>>
>> In case these details are helpful, here was my simple prototype of an
>> MCFG based approach:
>>
>> https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-rc1-
>> testing&id=c5d8bc49a198fd8f61f82c7d8f169564d6176b07
>> https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-rc1-
>> testing&id=50bfe77ccd1639e6ce8c7c4fcca187d50e0bead4
>>
>> Thanks,
>> Cov
>>
>> --
>> Qualcomm Innovation Center, Inc.
>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
>> a Linux Foundation Collaborative Project
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Gabriele Paoloni June 6, 2016, 7:27 a.m. UTC | #10
Hi Jeffrey

> -----Original Message-----
> From: Jeffrey Hugo [mailto:jhugo@codeaurora.org]
> Sent: 03 June 2016 18:00
> To: Gabriele Paoloni; Christopher Covington; Tomasz Nowicki;
> helgaas@kernel.org; arnd@arndb.de; will.deacon@arm.com;
> catalin.marinas@arm.com; rafael@kernel.org; hanjun.guo@linaro.org;
> Lorenzo.Pieralisi@arm.com; okaya@codeaurora.org; jchandra@broadcom.com
> Cc: liudongdong (C); linaro-acpi@lists.linaro.org; jcm@redhat.com;
> dhdang@apm.com; Liviu.Dudau@arm.com; ddaney@caviumnetworks.com;
> jeremy.linton@arm.com; linux-kernel@vger.kernel.org; linux-
> acpi@vger.kernel.org; robert.richter@caviumnetworks.com;
> msalter@redhat.com; Suravee.Suthikulpanit@amd.com; linux-
> pci@vger.kernel.org; Wangyijing; mw@semihalf.com;
> andrea.gallo@linaro.org; linux-arm-kernel@lists.infradead.org
> Subject: Re: [RFC PATCH 1/3] pci, acpi: Match PCI config space
> accessors against platfrom specific ECAM quirks.
> 
> On 6/3/2016 9:32 AM, Gabriele Paoloni wrote:
> > Hi Cov
> >
> >> -----Original Message-----
> >> From: linux-pci-owner@vger.kernel.org [mailto:linux-pci-
> >> owner@vger.kernel.org] On Behalf Of Christopher Covington
> >> Sent: 03 June 2016 16:15
> >> To: Tomasz Nowicki; helgaas@kernel.org; arnd@arndb.de;
> >> will.deacon@arm.com; catalin.marinas@arm.com; rafael@kernel.org;
> >> hanjun.guo@linaro.org; Lorenzo.Pieralisi@arm.com;
> okaya@codeaurora.org;
> >> jchandra@broadcom.com
> >> Cc: jcm@redhat.com; linaro-acpi@lists.linaro.org; linux-
> >> pci@vger.kernel.org; dhdang@apm.com; Liviu.Dudau@arm.com;
> >> ddaney@caviumnetworks.com; jeremy.linton@arm.com; linux-
> >> kernel@vger.kernel.org; linux-acpi@vger.kernel.org;
> >> robert.richter@caviumnetworks.com; Suravee.Suthikulpanit@amd.com;
> >> msalter@redhat.com; Wangyijing; mw@semihalf.com;
> >> andrea.gallo@linaro.org; linux-arm-kernel@lists.infradead.org;
> >> liudongdong (C); Gabriele Paoloni
> >> Subject: Re: [RFC PATCH 1/3] pci, acpi: Match PCI config space
> >> accessors against platfrom specific ECAM quirks.
> >>
> >> Hi Tomasz,
> >>
> >> Thanks for your work on this.
> >>
> >> On 06/02/2016 04:41 AM, Tomasz Nowicki wrote:
> >>> Some platforms may not be fully compliant with generic set of PCI
> >> config
> >>> accessors. For these cases we implement the way to overwrite
> >> accessors
> >>> set. Algorithm traverses available quirk list, matches against
> >>> <oem_id, oem_rev, domain, bus number> tuple and returns
> corresponding
> >>> PCI config ops. oem_id and oem_rev come from MCFG table standard
> >> header.
> >>> All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and
> >>> kept self contained. Example:
> >>>
> >>> /* Custom PCI config ops */
> >>> static struct pci_generic_ecam_ops foo_pci_ops = {
> >>> 	.bus_shift	= 24,
> >>> 	.pci_ops = {
> >>> 		.map_bus = pci_ecam_map_bus,
> >>> 		.read = foo_ecam_config_read,
> >>> 		.write = foo_ecam_config_write,
> >>> 	}
> >>> };
> >>>
> >>> DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_rev>,
> >> <domain_nr>, <bus_nr>);
> >>>
> >>> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
> >>> ---
> >>>  drivers/acpi/pci_mcfg.c           | 32
> >> ++++++++++++++++++++++++++++++++
> >>>  include/asm-generic/vmlinux.lds.h |  7 +++++++
> >>>  include/linux/pci-acpi.h          | 19 +++++++++++++++++++
> >>>  3 files changed, 58 insertions(+)
> >>>
> >>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> >>> index 1847f74..f3d4570 100644
> >>> --- a/drivers/acpi/pci_mcfg.c
> >>> +++ b/drivers/acpi/pci_mcfg.c
> >>> @@ -22,11 +22,43 @@
> >>>  #include <linux/kernel.h>
> >>>  #include <linux/pci.h>
> >>>  #include <linux/pci-acpi.h>
> >>> +#include <linux/pci-ecam.h>
> >>>
> >>>  /* Root pointer to the mapped MCFG table */
> >>>  static struct acpi_table_mcfg *mcfg_table;
> >>>  static int mcfg_entries;
> >>>
> >>> +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
> >>> +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
> >>> +
> >>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
> >>> +{
> >>> +	int bus_num = root->secondary.start;
> >>> +	int domain = root->segment;
> >>> +	struct pci_cfg_fixup *f;
> >>> +
> >>> +	if (!mcfg_table)
> >>> +		return &pci_generic_ecam_ops;
> >>> +
> >>> +	/*
> >>> +	 * Match against platform specific quirks and return
> >> corresponding
> >>> +	 * CAM ops.
> >>> +	 *
> >>> +	 * First match against PCI topology <domain:bus> then use OEM ID
> >> and
> >>> +	 * OEM revision from MCFG table standard header.
> >>> +	 */
> >>> +	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups;
> >> f++) {
> >>> +		if ((f->domain == domain || f->domain ==
> >> PCI_MCFG_DOMAIN_ANY) &&
> >>> +		    (f->bus_num == bus_num || f->bus_num ==
> >> PCI_MCFG_BUS_ANY) &&
> >>> +		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
> >>> +			      ACPI_OEM_ID_SIZE)) &&
> >>> +		    (f->oem_revision == mcfg_table->header.oem_revision))
> >>
> >> Is this more likely to be updated between quirky and fixed platforms
> >> than oem_table_id? What do folks think about using oem_table_id
> instead
> >> of, or in addition to, oem_revision?
> >
> > From my understanding we need to stick to this mechanism as
> (otherwise)
> > there are platforms out in the field that would need a FW update.
> >
> > So I don't think that using oem_table_id "instead" is possible; about
> > "in addition" I think it is doable, but I do not see the advantage
> much.
> > I mean that if a platform gets fixed the oem revision should change
> too,
> > Right?
> 
> Cov and I had a discussion about this, so hopefully I can bring a
> slightly different perspective that will make sense.
> 
> We forsee a situation where we have platform A that needs a quirk, and
> platform B that does not.  The OEM id is the same for both platforms as
> they are different platforms from the same OEM.  Using the OEM revision
> field does not seem to be appropriate since these are different
> platforms and the revision field appears to be for the purpose of
> tracking differences within a single platform.  Therefore, Cov is
> proposing using the OEM table id as a mechanism to distinguish platform
> A (needs quirk applied) vs platform B (no quirks) from the same OEM.

Ah yes I see now...

Probably it should be ok to have a check on all three OEM fields.

Thanks for explaining

Gab 

> 
> >
> > Thanks
> >
> > Gab
> >
> >>
> >> In case these details are helpful, here was my simple prototype of
> an
> >> MCFG based approach:
> >>
> >> https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-
> rc1-
> >> testing&id=c5d8bc49a198fd8f61f82c7d8f169564d6176b07
> >> https://codeaurora.org/cgit/quic/server/kernel/commit/?h=cov/4.7-
> rc1-
> >> testing&id=50bfe77ccd1639e6ce8c7c4fcca187d50e0bead4
> >>
> >> Thanks,
> >> Cov
> >>
> >> --
> >> Qualcomm Innovation Center, Inc.
> >> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> >> a Linux Foundation Collaborative Project
> >> --
> >> To unsubscribe from this list: send the line "unsubscribe linux-pci"
> in
> >> the body of a message to majordomo@vger.kernel.org
> >> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
> 
> 
> --
> Jeffrey Hugo
> Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a
> Linux Foundation Collaborative Project
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Hanjun Guo June 6, 2016, 7:54 a.m. UTC | #11
On 2016/6/6 15:27, Gabriele Paoloni wrote:
> Hi Jeffrey
>> On 6/3/2016 9:32 AM, Gabriele Paoloni wrote:
>>> Hi Cov
>>>
>>>> Hi Tomasz,
>>>>
>>>> Thanks for your work on this.
>>>>
>>>> On 06/02/2016 04:41 AM, Tomasz Nowicki wrote:
>>>>> Some platforms may not be fully compliant with generic set of PCI
>>>> config
>>>>> accessors. For these cases we implement the way to overwrite
>>>> accessors
>>>>> set. Algorithm traverses available quirk list, matches against
>>>>> <oem_id, oem_rev, domain, bus number> tuple and returns
>> corresponding
>>>>> PCI config ops. oem_id and oem_rev come from MCFG table standard
>>>> header.
>>>>> All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and
>>>>> kept self contained. Example:
>>>>>
>>>>> /* Custom PCI config ops */
>>>>> static struct pci_generic_ecam_ops foo_pci_ops = {
>>>>> 	.bus_shift	= 24,
>>>>> 	.pci_ops = {
>>>>> 		.map_bus = pci_ecam_map_bus,
>>>>> 		.read = foo_ecam_config_read,
>>>>> 		.write = foo_ecam_config_write,
>>>>> 	}
>>>>> };
>>>>>
>>>>> DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_rev>,
>>>> <domain_nr>, <bus_nr>);
>>>>>
>>>>> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
>>>>> ---
>>>>>  drivers/acpi/pci_mcfg.c           | 32
>>>> ++++++++++++++++++++++++++++++++
>>>>>  include/asm-generic/vmlinux.lds.h |  7 +++++++
>>>>>  include/linux/pci-acpi.h          | 19 +++++++++++++++++++
>>>>>  3 files changed, 58 insertions(+)
>>>>>
>>>>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>>>>> index 1847f74..f3d4570 100644
>>>>> --- a/drivers/acpi/pci_mcfg.c
>>>>> +++ b/drivers/acpi/pci_mcfg.c
>>>>> @@ -22,11 +22,43 @@
>>>>>  #include <linux/kernel.h>
>>>>>  #include <linux/pci.h>
>>>>>  #include <linux/pci-acpi.h>
>>>>> +#include <linux/pci-ecam.h>
>>>>>
>>>>>  /* Root pointer to the mapped MCFG table */
>>>>>  static struct acpi_table_mcfg *mcfg_table;
>>>>>  static int mcfg_entries;
>>>>>
>>>>> +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
>>>>> +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
>>>>> +
>>>>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
>>>>> +{
>>>>> +	int bus_num = root->secondary.start;
>>>>> +	int domain = root->segment;
>>>>> +	struct pci_cfg_fixup *f;
>>>>> +
>>>>> +	if (!mcfg_table)
>>>>> +		return &pci_generic_ecam_ops;
>>>>> +
>>>>> +	/*
>>>>> +	 * Match against platform specific quirks and return
>>>> corresponding
>>>>> +	 * CAM ops.
>>>>> +	 *
>>>>> +	 * First match against PCI topology <domain:bus> then use OEM ID
>>>> and
>>>>> +	 * OEM revision from MCFG table standard header.
>>>>> +	 */
>>>>> +	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups;
>>>> f++) {
>>>>> +		if ((f->domain == domain || f->domain ==
>>>> PCI_MCFG_DOMAIN_ANY) &&
>>>>> +		    (f->bus_num == bus_num || f->bus_num ==
>>>> PCI_MCFG_BUS_ANY) &&
>>>>> +		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
>>>>> +			      ACPI_OEM_ID_SIZE)) &&
>>>>> +		    (f->oem_revision == mcfg_table->header.oem_revision))
>>>>
>>>> Is this more likely to be updated between quirky and fixed platforms
>>>> than oem_table_id? What do folks think about using oem_table_id
>> instead
>>>> of, or in addition to, oem_revision?
>>>
>>> From my understanding we need to stick to this mechanism as
>> (otherwise)
>>> there are platforms out in the field that would need a FW update.
>>>
>>> So I don't think that using oem_table_id "instead" is possible; about
>>> "in addition" I think it is doable, but I do not see the advantage
>> much.
>>> I mean that if a platform gets fixed the oem revision should change
>> too,
>>> Right?
>>
>> Cov and I had a discussion about this, so hopefully I can bring a
>> slightly different perspective that will make sense.
>>
>> We forsee a situation where we have platform A that needs a quirk, and
>> platform B that does not.  The OEM id is the same for both platforms as
>> they are different platforms from the same OEM.  Using the OEM revision
>> field does not seem to be appropriate since these are different
>> platforms and the revision field appears to be for the purpose of
>> tracking differences within a single platform.  Therefore, Cov is
>> proposing using the OEM table id as a mechanism to distinguish platform
>> A (needs quirk applied) vs platform B (no quirks) from the same OEM.
>
> Ah yes I see now...
>
> Probably it should be ok to have a check on all three OEM fields.

Just for reference, x86 and IA64 use oem_id and oem_table_id to make a
difference between different platforms, see
acpi_madt_oem_check(char *oem_id, char *oem_table_id) for x86 and ia64,
that can apply to ARM64 on MCFG too.

Thanks
Hanjun
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Tomasz Nowicki June 14, 2016, 9:06 a.m. UTC | #12
Hi Arnd,

Sorry for late response. Please see comments inline.

On 02.06.2016 17:19, Arnd Bergmann wrote:
> On Thursday, June 2, 2016 3:35:34 PM CEST Tomasz Nowicki wrote:
>> On 02.06.2016 14:32, Arnd Bergmann wrote:
>>> On Thursday, June 2, 2016 2:07:43 PM CEST Tomasz Nowicki wrote:
>>>> On 02.06.2016 13:42, Arnd Bergmann wrote:
>>>>> On Thursday, June 2, 2016 10:41:01 AM CEST Tomasz Nowicki wrote:
>>>>>> +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
>>>>>> +{
>>>>>> +       int bus_num = root->secondary.start;
>>>>>> +       int domain = root->segment;
>>>>>> +       struct pci_cfg_fixup *f;
>>>>>> +
>>>>>> +       if (!mcfg_table)
>>>>>> +               return &pci_generic_ecam_ops;
>>>>>> +
>>>>>> +       /*
>>>>>> +        * Match against platform specific quirks and return corresponding
>>>>>> +        * CAM ops.
>>>>>> +        *
>>>>>> +        * First match against PCI topology <domain:bus> then use OEM ID and
>>>>>> +        * OEM revision from MCFG table standard header.
>>>>>> +        */
>>>>>> +       for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
>>>>>> +               if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
>>>>>> +                   (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
>>>>>> +                   (!strncmp(f->oem_id, mcfg_table->header.oem_id,
>>>>>> +                             ACPI_OEM_ID_SIZE)) &&
>>>>>> +                   (f->oem_revision == mcfg_table->header.oem_revision))
>>>>>> +                       return f->ops;
>>>>>> +       }
>>>>>> +       /* No quirks, use ECAM */
>>>>>> +       return &pci_generic_ecam_ops;
>>>>>> +}
>>>>>> +
>>>>>>     int pci_mcfg_lookup(struct acpi_pci_root *root)
>>>>>
>>>>> Can you explain the use of pci_ecam_ops instead of pci_ops here?
>>>>>
>>>>
>>>> I wanted to get associated bus_shift and use it to setup configuration
>>>> region properly before calling pci_ecam_create. Please see next patch.
>>>>
>>>
>>> I see. It feels really odd to do it this way though, since having a
>>> nonstandard bus_shift essentially means not using anything resembling
>>> ECAM to start with.
>>>
>>> I realize that a lot of the host bridges are not ECAM, but because
>>> of this, it would be more logical to have their own pci_ops instead
>>> of pci_ecam_ops.
>>
>> Well, we have bus_shift there to express bus shift differentiation. So I
>> would say we should change just structure name to prevent misunderstanding.
>
> I'm not really convinced here. We use the bus_shift for two
> completely different things in the end: for sizing the MMIO window
> that gets mapped by ACPI and for the pci_ecam_map_bus() function
> that isn't actually used for the typical fixups that override the
> pci_ops.

Since we overwrite the whole pci_ecam_ops structure (next patch):
-	cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res,
-			      &pci_generic_ecam_ops);
+	cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, ops);

IMO bus_shift is used in the right way. So if anybody decides to put 
different bus_shift there he also needs to implement map_bus and use 
there bus_shift appropriate to quirk requirements. Obviously we can use 
standard pci_ecam_map_bus() as map_bus but that would mean quirk nature 
needs that, like for ThunderX one.

>
> I see now that this sneaks in an .init callback for the quirk
> through the backdoor, by adding it to the pci_ecam_ops. I think
> that is not good: if the idea is to have the config space access
> be adapted to various quirks that is one thing, but if we actually
> need a function to be called for the quirk we should do just that
> and have it be obvious. That function can then override the
> pci_ops.

Actually we do not need to call a function for each quirk. At the same 
time we already have .init callback adopted to configuration space 
access quirk. This way there is really small amount of code duplication. 
On the other hand I understand that .init call should be more explicit. 
Any suggestions are very appreciated.

Thanks,
Tomasz
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diff mbox

Patch

diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index 1847f74..f3d4570 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -22,11 +22,43 @@ 
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/pci-acpi.h>
+#include <linux/pci-ecam.h>
 
 /* Root pointer to the mapped MCFG table */
 static struct acpi_table_mcfg *mcfg_table;
 static int mcfg_entries;
 
+extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
+extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
+
+struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
+{
+	int bus_num = root->secondary.start;
+	int domain = root->segment;
+	struct pci_cfg_fixup *f;
+
+	if (!mcfg_table)
+		return &pci_generic_ecam_ops;
+
+	/*
+	 * Match against platform specific quirks and return corresponding
+	 * CAM ops.
+	 *
+	 * First match against PCI topology <domain:bus> then use OEM ID and
+	 * OEM revision from MCFG table standard header.
+	 */
+	for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
+		if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
+		    (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
+		    (!strncmp(f->oem_id, mcfg_table->header.oem_id,
+			      ACPI_OEM_ID_SIZE)) &&
+		    (f->oem_revision == mcfg_table->header.oem_revision))
+			return f->ops;
+	}
+	/* No quirks, use ECAM */
+	return &pci_generic_ecam_ops;
+}
+
 int pci_mcfg_lookup(struct acpi_pci_root *root)
 {
 	struct acpi_mcfg_allocation *mptr, *entry = NULL;
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 6a67ab9..43604fc 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -300,6 +300,13 @@ 
 		VMLINUX_SYMBOL(__end_pci_fixups_suspend_late) = .;	\
 	}								\
 									\
+	/* ACPI MCFG quirks */						\
+	.acpi_fixup        : AT(ADDR(.acpi_fixup) - LOAD_OFFSET) {	\
+		VMLINUX_SYMBOL(__start_acpi_mcfg_fixups) = .;		\
+		*(.acpi_fixup_mcfg)					\
+		VMLINUX_SYMBOL(__end_acpi_mcfg_fixups) = .;		\
+	}								\
+									\
 	/* Built-in firmware blobs */					\
 	.builtin_fw        : AT(ADDR(.builtin_fw) - LOAD_OFFSET) {	\
 		VMLINUX_SYMBOL(__start_builtin_fw) = .;			\
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index e0e6dfc..b4e8106 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -25,6 +25,7 @@  static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev)
 extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle);
 
 extern int pci_mcfg_lookup(struct acpi_pci_root *root);
+extern struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root);
 
 static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
 {
@@ -72,6 +73,24 @@  struct acpi_pci_root_ops {
 	int (*prepare_resources)(struct acpi_pci_root_info *info);
 };
 
+struct pci_cfg_fixup {
+	struct pci_ecam_ops *ops;
+	char *oem_id;
+	u32 oem_revision;
+	int domain;
+	int bus_num;
+};
+
+#define PCI_MCFG_DOMAIN_ANY	-1
+#define PCI_MCFG_BUS_ANY	-1
+
+/* Designate a routine to fix up buggy MCFG */
+#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, rev, dom, bus)		\
+	static const struct pci_cfg_fixup __mcfg_fixup_##system##dom##bus\
+	 __used	__attribute__((__section__(".acpi_fixup_mcfg"),		\
+				aligned((sizeof(void *))))) =		\
+	{ ops, oem_id, rev, dom, bus };
+
 extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info);
 extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 					    struct acpi_pci_root_ops *ops,