From patchwork Thu Mar 26 15:15:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 6099961 Return-Path: X-Original-To: patchwork-linux-acpi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 37086BF90F for ; Thu, 26 Mar 2015 15:15:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 536A9203A4 for ; Thu, 26 Mar 2015 15:15:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55F85203AA for ; Thu, 26 Mar 2015 15:15:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752310AbbCZPPR (ORCPT ); Thu, 26 Mar 2015 11:15:17 -0400 Received: from foss.arm.com ([217.140.101.70]:53749 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752476AbbCZPPQ (ORCPT ); Thu, 26 Mar 2015 11:15:16 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6839A2A; Thu, 26 Mar 2015 08:15:19 -0700 (PDT) Received: from arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9DFF93F51A; Thu, 26 Mar 2015 08:15:11 -0700 (PDT) Date: Thu, 26 Mar 2015 15:15:10 +0000 From: Will Deacon To: Catalin Marinas Cc: "hanjun.guo@linaro.org" , "Rafael J. Wysocki" , Olof Johansson , "grant.likely@linaro.org" , Mark Rutland , Ashwin Chaugule , Lorenzo Pieralisi , Robert Richter , Arnd Bergmann , "graeme.gregory@linaro.org" , "linaro-acpi@lists.linaro.org" , Marc Zyngier , "jcm@redhat.com" , Timur Tabi , "msalter@redhat.com" , "linux-kernel@vger.kernel.org" , Tomasz Nowicki , "linux-acpi@vger.kernel.org" , Mark Brown , "suravee.suthikulpanit@amd.com" , Sudeep Holla , "linux-arm-kernel@lists.infradead.org" Subject: Re: [patch v11 12/23] ARM64 / ACPI: Parse MADT for SMP initialization Message-ID: <20150326151510.GI2805@arm.com> References: <1427205776-5060-1-git-send-email-hanjun.guo@linaro.org> <1427205776-5060-13-git-send-email-hanjun.guo@linaro.org> <20150325171735.GI14585@localhost> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20150325171735.GI14585@localhost> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Mar 25, 2015 at 05:17:35PM +0000, Catalin Marinas wrote: > On Tue, Mar 24, 2015 at 10:02:45PM +0800, Hanjun Guo wrote: > > +/** > > + * acpi_map_gic_cpu_interface - generates a logical cpu number > > + * and map to MPIDR represented by GICC structure > > + * @mpidr: CPU's hardware id to register, MPIDR represented in MADT > > + * @enabled: this cpu is enabled or not > > + * > > + * Returns the logical cpu number which maps to MPIDR > > + */ > > +static int __init acpi_map_gic_cpu_interface(u64 mpidr, u8 enabled) > > So here we have an u8 enabled. > > > +static int __init > > +acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header, > > + const unsigned long end) > > +{ > > + struct acpi_madt_generic_interrupt *processor; > > + > > + processor = (struct acpi_madt_generic_interrupt *)header; > > + > > + if (BAD_MADT_ENTRY(processor, end)) > > + return -EINVAL; > > + > > + acpi_table_print_madt_entry(header); > > + > > + acpi_map_gic_cpu_interface(processor->arm_mpidr & MPIDR_HWID_BITMASK, > > + processor->flags & ACPI_MADT_ENABLED); > > and here processor->flags is u32. Luckily, ACPI_MADT_ENABLED is 1 and we > don't lose any information. So either make the enabled above a bool or > simply pass the flags with the check in acpi_map_gic_cpu_interface() > (personal preference for the latter). I've applied the following patch on top of the series. Will --->8 commit 8ef320319592693f4a6286d80df210fd47b3e356 Author: Will Deacon Date: Thu Mar 26 15:09:20 2015 +0000 ARM64 / ACPI: fix usage of acpi_map_gic_cpu_interface acpi_parse_gic_cpu_interface calls acpi_map_gic_cpu_interface by both passing a 32-bit value in the u8 enabled parameter and then subsequently ignoring its return value. Sort it out. Reported-by: Catalin Marinas Signed-off-by: Will Deacon --- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index cd60329da8c4..07649e413244 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -103,9 +103,12 @@ void __init __acpi_unmap_table(char *map, unsigned long size) * * Returns the logical cpu number which maps to MPIDR */ -static int __init acpi_map_gic_cpu_interface(u64 mpidr, u8 enabled) +static int __init +acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) { int i; + u64 mpidr = processor->arm_mpidr & MPIDR_HWID_BITMASK; + bool enabled = !!(processor->flags & ACPI_MADT_ENABLED); if (mpidr == INVALID_HWID) { pr_info("Skip MADT cpu entry with invalid MPIDR\n"); @@ -178,11 +181,7 @@ acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header, return -EINVAL; acpi_table_print_madt_entry(header); - - acpi_map_gic_cpu_interface(processor->arm_mpidr & MPIDR_HWID_BITMASK, - processor->flags & ACPI_MADT_ENABLED); - - return 0; + return acpi_map_gic_cpu_interface(processor); } /* Parse GIC cpu interface entries in MADT for SMP init */