From patchwork Fri Jul 29 20:59:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ross Zwisler X-Patchwork-Id: 9252815 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8C97060757 for ; Fri, 29 Jul 2016 20:59:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7E11A28420 for ; Fri, 29 Jul 2016 20:59:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 72B2428424; Fri, 29 Jul 2016 20:59:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F23A28422 for ; Fri, 29 Jul 2016 20:59:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754050AbcG2U7Z (ORCPT ); Fri, 29 Jul 2016 16:59:25 -0400 Received: from mga03.intel.com ([134.134.136.65]:58941 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754047AbcG2U7X (ORCPT ); Fri, 29 Jul 2016 16:59:23 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP; 29 Jul 2016 13:59:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,441,1464678000"; d="scan'208";a="1031727201" Received: from theros.lm.intel.com ([10.232.112.155]) by fmsmga002.fm.intel.com with ESMTP; 29 Jul 2016 13:59:20 -0700 From: Ross Zwisler To: linux-kernel@vger.kernel.org Cc: Ross Zwisler , "Rafael J. Wysocki" , Len Brown , linux-acpi@vger.kernel.org, linux-nvdimm@lists.01.org, Dan Williams , stable@vger.kernel.org Subject: [PATCH] libnvdimm, nd_blk: mask off reserved status bits Date: Fri, 29 Jul 2016 14:59:12 -0600 Message-Id: <20160729205912.20436-1-ross.zwisler@linux.intel.com> X-Mailer: git-send-email 2.9.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The "NVDIMM Block Window Driver Writer's Guide": http://pmem.io/documents/ http://pmem.io/documents/NVDIMM_DriverWritersGuide-July-2016.pdf defines the layout of the block window status register. For the July 2016 version of the spec linked to above, this happens in Figure 4 on page 26. The only bits defined in this spec are bits 31, 5, 4, 2, 1 and 0. The rest of the bits in the status register are reserved, and there is a warning following the diagram that says: Note: The driver cannot assume the value of the RESERVED bits in the status register are zero. These reserved bits need to be masked off, and the driver must avoid checking the state of those bits. This change ensures that for hardware implementations that set these reserved bits in the status register, the driver won't incorrectly fail the block I/Os. Signed-off-by: Ross Zwisler Cc: Dan Williams Cc: stable@vger.kernel.org Reviewed-by: Lee, Chun-Yi --- drivers/acpi/nfit.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/nfit.c b/drivers/acpi/nfit.c index 1f0e060..375c10f 100644 --- a/drivers/acpi/nfit.c +++ b/drivers/acpi/nfit.c @@ -1396,11 +1396,12 @@ static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) { struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; u64 offset = nfit_blk->stat_offset + mmio->size * bw; + const u32 STATUS_MASK = 0x80000037; if (mmio->num_lines) offset = to_interleave_offset(offset, mmio); - return readl(mmio->addr.base + offset); + return readl(mmio->addr.base + offset) & STATUS_MASK; } static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,