diff mbox

[v8,07/13] drivers: base cacheinfo: Add support for ACPI based firmware tables

Message ID 20180425233121.13270-8-jeremy.linton@arm.com (mailing list archive)
State Changes Requested, archived
Headers show

Commit Message

Jeremy Linton April 25, 2018, 11:31 p.m. UTC
Call ACPI cache parsing routines from base cacheinfo code if ACPI
is enable. Also stub out cache_setup_acpi() so that individual
architectures can enable ACPI topology parsing.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
 drivers/base/cacheinfo.c  | 14 ++++++++++----
 include/linux/cacheinfo.h | 10 ++++++++++
 2 files changed, 20 insertions(+), 4 deletions(-)

Comments

Sudeep Holla April 26, 2018, 11:05 a.m. UTC | #1
On 26/04/18 00:31, Jeremy Linton wrote:
> Call ACPI cache parsing routines from base cacheinfo code if ACPI
> is enable. Also stub out cache_setup_acpi() so that individual
> architectures can enable ACPI topology parsing.
> 

[...]

> +#ifndef CONFIG_ACPI
> +static inline int acpi_find_last_cache_level(unsigned int cpu)
> +{
> +	/* ACPI kernels should be built with PPTT support */

This sounds incorrect for x86. But I understand why you have it there.
Does it makes sense to change above to .. ?

#if !defined(CONFIG_ACPI) || (defined(CONFIG_ACPI) && !(CONFIG_ACPI_PPTT))
Jeremy Linton April 26, 2018, 6:57 p.m. UTC | #2
Hi,

On 04/26/2018 06:05 AM, Sudeep Holla wrote:
> 
> 
> On 26/04/18 00:31, Jeremy Linton wrote:
>> Call ACPI cache parsing routines from base cacheinfo code if ACPI
>> is enable. Also stub out cache_setup_acpi() so that individual
>> architectures can enable ACPI topology parsing.
>>
> 
> [...]
> 
>> +#ifndef CONFIG_ACPI
>> +static inline int acpi_find_last_cache_level(unsigned int cpu)
>> +{
>> +	/* ACPI kernels should be built with PPTT support */
> 
> This sounds incorrect for x86. But I understand why you have it there.
> Does it makes sense to change above to .. ?
> 
> #if !defined(CONFIG_ACPI) || (defined(CONFIG_ACPI) && !(CONFIG_ACPI_PPTT))
> 
I'm not sure what that buys us, if anything you want more non-users of 
the function to be falling through to the function prototype rather than 
the static inline. The only place any of this matters (as long as the 
compiler/linker is tossing the static inline) is arm64 because its the 
only arch making a call to acpi_find_last_cache_level(). ACPI_PPTT is 
also only visible on arm64 at the moment due to being wrapped in a if 
ARM64 in the Kconfig

Put another way, I wouldn't expect an arch to have a 'user' visible 
option to enable/disable parsing the PPTT. If an arch can handle 
ACPI/PPTT topology then I would expect it to be fixed to the CONFIG_ACPI 
state. What happens when acpi_find_last_cache_level() is called should 
only be dependent on whether ACPI is enabled, the PPTT parser itself 
will handle the cases of a missing table.
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Sudeep Holla April 27, 2018, 12:49 p.m. UTC | #3
On 26/04/18 19:57, Jeremy Linton wrote:
> Hi,
> 
> On 04/26/2018 06:05 AM, Sudeep Holla wrote:
>>
>>
>> On 26/04/18 00:31, Jeremy Linton wrote:
>>> Call ACPI cache parsing routines from base cacheinfo code if ACPI
>>> is enable. Also stub out cache_setup_acpi() so that individual
>>> architectures can enable ACPI topology parsing.
>>>
>>
>> [...]
>>
>>> +#ifndef CONFIG_ACPI
>>> +static inline int acpi_find_last_cache_level(unsigned int cpu)
>>> +{
>>> +    /* ACPI kernels should be built with PPTT support */
>>
>> This sounds incorrect for x86. But I understand why you have it there.
>> Does it makes sense to change above to .. ?
>>
>> #if !defined(CONFIG_ACPI) || (defined(CONFIG_ACPI) &&
>> !(CONFIG_ACPI_PPTT))
>>
> I'm not sure what that buys us, if anything you want more non-users of
> the function to be falling through to the function prototype rather than
> the static inline. The only place any of this matters (as long as the
> compiler/linker is tossing the static inline) is arm64 because its the
> only arch making a call to acpi_find_last_cache_level(). ACPI_PPTT is
> also only visible on arm64 at the moment due to being wrapped in a if
> ARM64 in the Kconfig
> 

Fair enough.

> Put another way, I wouldn't expect an arch to have a 'user' visible
> option to enable/disable parsing the PPTT. If an arch can handle
> ACPI/PPTT topology then I would expect it to be fixed to the CONFIG_ACPI
> state. What happens when acpi_find_last_cache_level() is called should
> only be dependent on whether ACPI is enabled, the PPTT parser itself
> will handle the cases of a missing table.

Agreed. But technically that statement is still incorrect as x86 ACPI
build need not have PPTT enabled. IMO you can reword it, but I will
leave that to Rafael :)

Other than that, it looks good.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
diff mbox

Patch

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 597aacb233fc..2880e2ab01f5 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -206,7 +206,7 @@  static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
 					   struct cacheinfo *sib_leaf)
 {
 	/*
-	 * For non-DT systems, assume unique level 1 cache, system-wide
+	 * For non-DT/ACPI systems, assume unique level 1 caches, system-wide
 	 * shared caches for all other levels. This will be used only if
 	 * arch specific code has not populated shared_cpu_map
 	 */
@@ -214,6 +214,11 @@  static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
 }
 #endif
 
+int __weak cache_setup_acpi(unsigned int cpu)
+{
+	return -ENOTSUPP;
+}
+
 static int cache_shared_cpu_map_setup(unsigned int cpu)
 {
 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
@@ -227,8 +232,8 @@  static int cache_shared_cpu_map_setup(unsigned int cpu)
 	if (of_have_populated_dt())
 		ret = cache_setup_of_node(cpu);
 	else if (!acpi_disabled)
-		/* No cache property/hierarchy support yet in ACPI */
-		ret = -ENOTSUPP;
+		ret = cache_setup_acpi(cpu);
+
 	if (ret)
 		return ret;
 
@@ -279,7 +284,8 @@  static void cache_shared_cpu_map_remove(unsigned int cpu)
 			cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
 			cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
 		}
-		of_node_put(this_leaf->fw_token);
+		if (of_have_populated_dt())
+			of_node_put(this_leaf->fw_token);
 	}
 }
 
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index 0c6f658054d2..70ef44669fa3 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -97,6 +97,16 @@  int func(unsigned int cpu)					\
 struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu);
 int init_cache_level(unsigned int cpu);
 int populate_cache_leaves(unsigned int cpu);
+int cache_setup_acpi(unsigned int cpu);
+#ifndef CONFIG_ACPI
+static inline int acpi_find_last_cache_level(unsigned int cpu)
+{
+	/* ACPI kernels should be built with PPTT support */
+	return 0;
+}
+#else
+int acpi_find_last_cache_level(unsigned int cpu);
+#endif
 
 const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf);