diff mbox series

[v3] i2c: designware: Set IRQF_NO_SUSPEND flag for all BYT and CHT controllers

Message ID 20181006082539.32497-1-hdegoede@redhat.com (mailing list archive)
State Not Applicable
Headers show
Series [v3] i2c: designware: Set IRQF_NO_SUSPEND flag for all BYT and CHT controllers | expand

Commit Message

Hans de Goede Oct. 6, 2018, 8:25 a.m. UTC 
On some Cherry Trail systems the GPU ACPI fwnode has power-resources which
point to the PMIC, which is connected over a LPSS I2C controller. The GPU
is a PCI device and PCI devices are powered-on at the resume_noirq resume
phase.

Since the GPU power-resources need the I2C controller, recent acpi_lpss.c
changes now also power-up the LPSS I2C controllers on BYT and CHT devices
in the resume_noirq resume phase. But during this phase the IRQ of the
controller is disabled leading to these errors:

 i2c_designware 808622C1:06: controller timed out
 ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion]
 ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR
 video LNXVIDEO:00: Failed to change power state to D0

This commit makes the i2c-designware controller set the IRQF_NO_SUSPEND
flag when requesting the interrupt on BYT and CHT devices, so that the IRQ
is left enabled during the noirq phase, fixing this.

Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
Changes in v2:
-No changes in v2 of the patchset

Changes in v3:
-Rebase on top of latest i2c/for-next
---
 drivers/i2c/busses/i2c-designware-core.h    | 1 +
 drivers/i2c/busses/i2c-designware-master.c  | 2 +-
 drivers/i2c/busses/i2c-designware-platdrv.c | 4 ++--
 3 files changed, 4 insertions(+), 3 deletions(-)

Comments

Mika Westerberg Oct. 8, 2018, 7:58 a.m. UTC | #1 
On Sat, Oct 06, 2018 at 10:25:39AM +0200, Hans de Goede wrote:
> On some Cherry Trail systems the GPU ACPI fwnode has power-resources which
> point to the PMIC, which is connected over a LPSS I2C controller. The GPU
> is a PCI device and PCI devices are powered-on at the resume_noirq resume
> phase.
> 
> Since the GPU power-resources need the I2C controller, recent acpi_lpss.c
> changes now also power-up the LPSS I2C controllers on BYT and CHT devices
> in the resume_noirq resume phase. But during this phase the IRQ of the
> controller is disabled leading to these errors:
> 
>  i2c_designware 808622C1:06: controller timed out
>  ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion]
>  ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR
>  video LNXVIDEO:00: Failed to change power state to D0
> 
> This commit makes the i2c-designware controller set the IRQF_NO_SUSPEND
> flag when requesting the interrupt on BYT and CHT devices, so that the IRQ
> is left enabled during the noirq phase, fixing this.
> 
> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Wolfram Sang Oct. 11, 2018, 9:06 p.m. UTC | #2 
On Sat, Oct 06, 2018 at 10:25:39AM +0200, Hans de Goede wrote:
> On some Cherry Trail systems the GPU ACPI fwnode has power-resources which
> point to the PMIC, which is connected over a LPSS I2C controller. The GPU
> is a PCI device and PCI devices are powered-on at the resume_noirq resume
> phase.
> 
> Since the GPU power-resources need the I2C controller, recent acpi_lpss.c
> changes now also power-up the LPSS I2C controllers on BYT and CHT devices
> in the resume_noirq resume phase. But during this phase the IRQ of the
> controller is disabled leading to these errors:
> 
>  i2c_designware 808622C1:06: controller timed out
>  ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion]
>  ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR
>  video LNXVIDEO:00: Failed to change power state to D0
> 
> This commit makes the i2c-designware controller set the IRQF_NO_SUSPEND
> flag when requesting the interrupt on BYT and CHT devices, so that the IRQ
> is left enabled during the noirq phase, fixing this.
> 
> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Applied to for-next, thanks!
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index fb40d76639da..9ec8394f4787 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -278,6 +278,7 @@  struct dw_i2c_dev {
 #define ACCESS_SWAP		0x00000001
 #define ACCESS_16BIT		0x00000002
 #define ACCESS_INTR_MASK	0x00000004
+#define ACCESS_NO_IRQ_SUSPEND	0x00000008
 
 #define MODEL_CHERRYTRAIL	0x00000100
 #define MODEL_MSCC_OCELOT	0x00000200
diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index 3f843fa161c3..8d1bc44d2530 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -709,7 +709,7 @@  int i2c_dw_probe(struct dw_i2c_dev *dev)
 	adap->dev.parent = dev->dev;
 	i2c_set_adapdata(adap, dev);
 
-	if (dev->shared_with_punit) {
+	if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
 		irq_flags = IRQF_NO_SUSPEND;
 	} else {
 		irq_flags = IRQF_SHARED | IRQF_COND_SUSPEND;
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 51cb17287c47..997bbb3d925f 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -123,8 +123,8 @@  static const struct acpi_device_id dw_i2c_acpi_match[] = {
 	{ "INT33C3", 0 },
 	{ "INT3432", 0 },
 	{ "INT3433", 0 },
-	{ "80860F41", 0 },
-	{ "808622C1", MODEL_CHERRYTRAIL },
+	{ "80860F41", ACCESS_NO_IRQ_SUSPEND },
+	{ "808622C1", ACCESS_NO_IRQ_SUSPEND | MODEL_CHERRYTRAIL },
 	{ "AMD0010", ACCESS_INTR_MASK },
 	{ "AMDI0010", ACCESS_INTR_MASK },
 	{ "AMDI0510", 0 },