From patchwork Tue Dec 11 01:03:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Busch X-Patchwork-Id: 10722943 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 541E117FE for ; Tue, 11 Dec 2018 01:06:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 44D612A0E6 for ; Tue, 11 Dec 2018 01:06:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 38E272A4ED; Tue, 11 Dec 2018 01:06:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD5D02A170 for ; Tue, 11 Dec 2018 01:06:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729486AbeLKBFw (ORCPT ); Mon, 10 Dec 2018 20:05:52 -0500 Received: from mga02.intel.com ([134.134.136.20]:24625 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729465AbeLKBFv (ORCPT ); Mon, 10 Dec 2018 20:05:51 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Dec 2018 17:05:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,340,1539673200"; d="scan'208";a="117705205" Received: from unknown (HELO localhost.lm.intel.com) ([10.232.112.69]) by orsmga001.jf.intel.com with ESMTP; 10 Dec 2018 17:05:50 -0800 From: Keith Busch To: linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-mm@kvack.org Cc: Greg Kroah-Hartman , Rafael Wysocki , Dave Hansen , Dan Williams , Keith Busch Subject: [PATCHv2 08/12] acpi/hmat: Register performance attributes Date: Mon, 10 Dec 2018 18:03:06 -0700 Message-Id: <20181211010310.8551-9-keith.busch@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20181211010310.8551-1-keith.busch@intel.com> References: <20181211010310.8551-1-keith.busch@intel.com> Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Save the best performance access attributes and register these with the memory's node if HMAT provides the locality table. Signed-off-by: Keith Busch --- drivers/acpi/Kconfig | 1 + drivers/acpi/hmat.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index 9a05af3a18cf..6b5f6ca690af 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -330,6 +330,7 @@ config ACPI_NUMA config ACPI_HMAT bool "ACPI Heterogeneous Memory Attribute Table Support" depends on ACPI_NUMA + select HMEM_REPORTING help Parses representation of the ACPI Heterogeneous Memory Attributes Table (HMAT) and set the memory node relationships and access diff --git a/drivers/acpi/hmat.c b/drivers/acpi/hmat.c index 5d8747ad025f..40bc83f4b593 100644 --- a/drivers/acpi/hmat.c +++ b/drivers/acpi/hmat.c @@ -23,6 +23,8 @@ struct memory_target { struct list_head node; unsigned int memory_pxm; unsigned long p_nodes[BITS_TO_LONGS(MAX_NUMNODES)]; + bool hmem_valid; + struct node_hmem_attrs hmem; }; static __init struct memory_target *find_mem_target(unsigned int m) @@ -108,6 +110,34 @@ static __init void hmat_update_access(u8 type, u32 value, u32 *best) } } +static __init void hmat_update_target(struct memory_target *t, u8 type, + u32 value) +{ + switch (type) { + case ACPI_HMAT_ACCESS_LATENCY: + t->hmem.read_latency = value; + t->hmem.write_latency = value; + break; + case ACPI_HMAT_READ_LATENCY: + t->hmem.read_latency = value; + break; + case ACPI_HMAT_WRITE_LATENCY: + t->hmem.write_latency = value; + break; + case ACPI_HMAT_ACCESS_BANDWIDTH: + t->hmem.read_bandwidth = value; + t->hmem.write_bandwidth = value; + break; + case ACPI_HMAT_READ_BANDWIDTH: + t->hmem.read_bandwidth = value; + break; + case ACPI_HMAT_WRITE_BANDWIDTH: + t->hmem.write_bandwidth = value; + break; + } + t->hmem_valid = true; +} + static __init int hmat_parse_locality(union acpi_subtable_headers *header, const unsigned long end) { @@ -166,6 +196,8 @@ static __init int hmat_parse_locality(union acpi_subtable_headers *header, set_bit(p_node, t->p_nodes); } } + if (t && best) + hmat_update_target(t, type, best); } return 0; } @@ -267,6 +299,8 @@ static __init void hmat_register_targets(void) m = pxm_to_node(t->memory_pxm); for_each_set_bit(p, t->p_nodes, MAX_NUMNODES) register_memory_node_under_compute_node(m, p); + if (t->hmem_valid) + node_set_perf_attrs(m, &t->hmem); kfree(t); } }