diff mbox series

[2/2] arm64: topology: Use PPTT to determine if PE is a thread

Message ID 20190523224015.56270-3-jeremy.linton@arm.com (mailing list archive)
State Changes Requested, archived
Headers show
Series arm64/PPTT ACPI 6.3 thread flag support | expand

Commit Message

Jeremy Linton May 23, 2019, 10:40 p.m. UTC
ACPI 6.3 adds a thread flag to represent if a CPU/PE is
actually a thread. Given that the MPIDR_MT bit may not
represent this information consistently on homogeneous machines
we should prefer the PPTT flag if its available.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
 arch/arm64/kernel/topology.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

John Garry June 6, 2019, 8:49 a.m. UTC | #1
On 23/05/2019 23:40, Jeremy Linton wrote:
> ACPI 6.3 adds a thread flag to represent if a CPU/PE is
> actually a thread. Given that the MPIDR_MT bit may not
> represent this information consistently on homogeneous machines
> we should prefer the PPTT flag if its available.
>

Hi Jeremy,

I was just wondering if we should look to get this support backported 
(when merged)?

I worry about the case of a system with the CPU having MT bit in the 
MPIDR (while not actually threaded), i.e. the system for which these 
PPTT flags were added (as I understand).

> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
>  arch/arm64/kernel/topology.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
> index 0825c4a856e3..cbbedb53cf06 100644
> --- a/arch/arm64/kernel/topology.c
> +++ b/arch/arm64/kernel/topology.c
> @@ -346,11 +346,9 @@ void remove_cpu_topology(unsigned int cpu)
>   */
>  static int __init parse_acpi_topology(void)
>  {
> -	bool is_threaded;
> +	int is_threaded;
>  	int cpu, topology_id;
>
> -	is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
> -
>  	for_each_possible_cpu(cpu) {
>  		int i, cache_id;
>
> @@ -358,6 +356,10 @@ static int __init parse_acpi_topology(void)
>  		if (topology_id < 0)
>  			return topology_id;
>
> +		is_threaded = acpi_pptt_cpu_is_thread(cpu);
> +		if (is_threaded < 0)
> +			is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
> +
>  		if (is_threaded) {
>  			cpu_topology[cpu].thread_id = topology_id;

For described above scenario, this seems wrong.

>  			topology_id = find_acpi_cpu_topology(cpu, 1);
>

BTW, we did test an old kernel with 6.3 PPTT bios for this on D06 (some 
versions have MT bit set), and it looked ok. But I am still a bit skeptical.

Thanks,
John
Jeremy Linton June 7, 2019, 7:21 p.m. UTC | #2
Hi,

Thanks for testing and looking at this.

On 6/6/19 3:49 AM, John Garry wrote:
> On 23/05/2019 23:40, Jeremy Linton wrote:
>> ACPI 6.3 adds a thread flag to represent if a CPU/PE is
>> actually a thread. Given that the MPIDR_MT bit may not
>> represent this information consistently on homogeneous machines
>> we should prefer the PPTT flag if its available.
>>
> 
> Hi Jeremy,
> 
> I was just wondering if we should look to get this support backported 
> (when merged)?

I imagine that will happen..

> 
> I worry about the case of a system with the CPU having MT bit in the 
> MPIDR (while not actually threaded), i.e. the system for which these 
> PPTT flags were added (as I understand).

I have tested this patch on DAWN which happens to have the MT bit set, 
but isn't threaded, and it appears to work.

> 
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> ---
>>  arch/arm64/kernel/topology.c | 8 +++++---
>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
>> index 0825c4a856e3..cbbedb53cf06 100644
>> --- a/arch/arm64/kernel/topology.c
>> +++ b/arch/arm64/kernel/topology.c
>> @@ -346,11 +346,9 @@ void remove_cpu_topology(unsigned int cpu)
>>   */
>>  static int __init parse_acpi_topology(void)
>>  {
>> -    bool is_threaded;
>> +    int is_threaded;
>>      int cpu, topology_id;
>>
>> -    is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
>> -
>>      for_each_possible_cpu(cpu) {
>>          int i, cache_id;
>>
>> @@ -358,6 +356,10 @@ static int __init parse_acpi_topology(void)
>>          if (topology_id < 0)
>>              return topology_id;
>>
>> +        is_threaded = acpi_pptt_cpu_is_thread(cpu);
>> +        if (is_threaded < 0)
>> +            is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
>> +
>>          if (is_threaded) {
>>              cpu_topology[cpu].thread_id = topology_id;
> 
> For described above scenario, this seems wrong.

I'm not sure I understand the concern.

This is going to ignore the MPIDR_MT bit on any machine with a PPTT 
revision > 1. Are you worried about the topology_id assignment?


> 
>>              topology_id = find_acpi_cpu_topology(cpu, 1);
>>
> 
> BTW, we did test an old kernel with 6.3 PPTT bios for this on D06 (some 
> versions have MT bit set), and it looked ok. But I am still a bit 
> skeptical.
> 
> Thanks,
> John
> 
> 


Thanks,
John Garry June 10, 2019, 8:30 a.m. UTC | #3
On 07/06/2019 20:21, Jeremy Linton wrote:
> Hi,
>
> Thanks for testing and looking at this.
>
> On 6/6/19 3:49 AM, John Garry wrote:
>> On 23/05/2019 23:40, Jeremy Linton wrote:
>>> ACPI 6.3 adds a thread flag to represent if a CPU/PE is
>>> actually a thread. Given that the MPIDR_MT bit may not
>>> represent this information consistently on homogeneous machines
>>> we should prefer the PPTT flag if its available.
>>>
>>

Hi Jeremy,

>>
>> I was just wondering if we should look to get this support backported
>> (when merged)?
>
> I imagine that will happen..
>
>>
>> I worry about the case of a system with the CPU having MT bit in the
>> MPIDR (while not actually threaded), i.e. the system for which these
>> PPTT flags were added (as I understand).
>
> I have tested this patch on DAWN which happens to have the MT bit set,
> but isn't threaded, and it appears to work.

Can you describe your test?

>
>>
>>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>>> ---
>>>  arch/arm64/kernel/topology.c | 8 +++++---
>>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
>>> index 0825c4a856e3..cbbedb53cf06 100644
>>> --- a/arch/arm64/kernel/topology.c
>>> +++ b/arch/arm64/kernel/topology.c
>>> @@ -346,11 +346,9 @@ void remove_cpu_topology(unsigned int cpu)
>>>   */
>>>  static int __init parse_acpi_topology(void)
>>>  {
>>> -    bool is_threaded;
>>> +    int is_threaded;
>>>      int cpu, topology_id;
>>>
>>> -    is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
>>> -
>>>      for_each_possible_cpu(cpu) {
>>>          int i, cache_id;
>>>
>>> @@ -358,6 +356,10 @@ static int __init parse_acpi_topology(void)
>>>          if (topology_id < 0)
>>>              return topology_id;
>>>
>>> +        is_threaded = acpi_pptt_cpu_is_thread(cpu);
>>> +        if (is_threaded < 0)
>>> +            is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
>>> +
>>>          if (is_threaded) {
>>>              cpu_topology[cpu].thread_id = topology_id;
>>
>> For described above scenario, this seems wrong.
>
> I'm not sure I understand the concern.

Maybe I wasn't clear enough previously. I am saying that without this 
patch, then this info would not be correct. Hence the request to 
backport to stable.

cheers,

>
> This is going to ignore the MPIDR_MT bit on any machine with a PPTT
> revision > 1. Are you worried about the topology_id assignment?
>
>
>>
>>>              topology_id = find_acpi_cpu_topology(cpu, 1);
>>>
>>
>> BTW, we did test an old kernel with 6.3 PPTT bios for this on D06
>> (some versions have MT bit set), and it looked ok. But I am still a
>> bit skeptical.
>>
>> Thanks,
>> John
>>
>>
>
>
> Thanks,
>
> .
>
Jeremy Linton June 11, 2019, 7:02 p.m. UTC | #4
Hi,

On 6/10/19 3:30 AM, John Garry wrote:
> On 07/06/2019 20:21, Jeremy Linton wrote:
>> Hi,
>>
>> Thanks for testing and looking at this.
>>
>> On 6/6/19 3:49 AM, John Garry wrote:
>>> On 23/05/2019 23:40, Jeremy Linton wrote:
>>>> ACPI 6.3 adds a thread flag to represent if a CPU/PE is
>>>> actually a thread. Given that the MPIDR_MT bit may not
>>>> represent this information consistently on homogeneous machines
>>>> we should prefer the PPTT flag if its available.
>>>>
>>>
> 
> Hi Jeremy,
> 
>>>
>>> I was just wondering if we should look to get this support backported
>>> (when merged)?
>>
>> I imagine that will happen..
>>
>>>
>>> I worry about the case of a system with the CPU having MT bit in the
>>> MPIDR (while not actually threaded), i.e. the system for which these
>>> PPTT flags were added (as I understand).
>>
>> I have tested this patch on DAWN which happens to have the MT bit set,
>> but isn't threaded, and it appears to work.
> 
> Can you describe your test?

The positive test:

Boot machine with/without patch, compare the output of lscpu & lstopo. 
Manually check/compare /sys/devices/system/cpu/cpuX/topology/* and 
/proc/schedstat domain masks. On DAWN we go from a system reporting 2 
cores with 2 thread per core to 4 cores.

I've also built firmware or injected PPTT's with varying versions/etc to 
sanity check cases that aren't representative of the hardware.



> 
>>
>>>
>>>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>>>> ---
>>>>  arch/arm64/kernel/topology.c | 8 +++++---
>>>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/kernel/topology.c 
>>>> b/arch/arm64/kernel/topology.c
>>>> index 0825c4a856e3..cbbedb53cf06 100644
>>>> --- a/arch/arm64/kernel/topology.c
>>>> +++ b/arch/arm64/kernel/topology.c
>>>> @@ -346,11 +346,9 @@ void remove_cpu_topology(unsigned int cpu)
>>>>   */
>>>>  static int __init parse_acpi_topology(void)
>>>>  {
>>>> -    bool is_threaded;
>>>> +    int is_threaded;
>>>>      int cpu, topology_id;
>>>>
>>>> -    is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
>>>> -
>>>>      for_each_possible_cpu(cpu) {
>>>>          int i, cache_id;
>>>>
>>>> @@ -358,6 +356,10 @@ static int __init parse_acpi_topology(void)
>>>>          if (topology_id < 0)
>>>>              return topology_id;
>>>>
>>>> +        is_threaded = acpi_pptt_cpu_is_thread(cpu);
>>>> +        if (is_threaded < 0)
>>>> +            is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
>>>> +
>>>>          if (is_threaded) {
>>>>              cpu_topology[cpu].thread_id = topology_id;
>>>
>>> For described above scenario, this seems wrong.
>>
>> I'm not sure I understand the concern.
> 
> Maybe I wasn't clear enough previously. I am saying that without this 
> patch, then this info would not be correct. Hence the request to 
> backport to stable.
> 
> cheers,
> 
>>
>> This is going to ignore the MPIDR_MT bit on any machine with a PPTT
>> revision > 1. Are you worried about the topology_id assignment?
>>
>>
>>>
>>>>              topology_id = find_acpi_cpu_topology(cpu, 1);
>>>>
>>>
>>> BTW, we did test an old kernel with 6.3 PPTT bios for this on D06
>>> (some versions have MT bit set), and it looked ok. But I am still a
>>> bit skeptical.
>>>
>>> Thanks,
>>> John
>>>
>>>
>>
>>
>> Thanks,
>>
>> .
>>
> 
>
diff mbox series

Patch

diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
index 0825c4a856e3..cbbedb53cf06 100644
--- a/arch/arm64/kernel/topology.c
+++ b/arch/arm64/kernel/topology.c
@@ -346,11 +346,9 @@  void remove_cpu_topology(unsigned int cpu)
  */
 static int __init parse_acpi_topology(void)
 {
-	bool is_threaded;
+	int is_threaded;
 	int cpu, topology_id;
 
-	is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
-
 	for_each_possible_cpu(cpu) {
 		int i, cache_id;
 
@@ -358,6 +356,10 @@  static int __init parse_acpi_topology(void)
 		if (topology_id < 0)
 			return topology_id;
 
+		is_threaded = acpi_pptt_cpu_is_thread(cpu);
+		if (is_threaded < 0)
+			is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
+
 		if (is_threaded) {
 			cpu_topology[cpu].thread_id = topology_id;
 			topology_id = find_acpi_cpu_topology(cpu, 1);