From patchwork Wed Aug 21 14:52:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 11107183 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 80E5D13A4 for ; Wed, 21 Aug 2019 14:53:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 69D78233A0 for ; Wed, 21 Aug 2019 14:53:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727926AbfHUOxR (ORCPT ); Wed, 21 Aug 2019 10:53:17 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:4752 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727696AbfHUOxQ (ORCPT ); Wed, 21 Aug 2019 10:53:16 -0400 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A01EA1FB20CC1D5D76A0; Wed, 21 Aug 2019 22:53:11 +0800 (CST) Received: from lhrphicprd00229.huawei.com (10.123.41.22) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.439.0; Wed, 21 Aug 2019 22:53:04 +0800 From: Jonathan Cameron To: , , , CC: Keith Busch , , "Rafael J . Wysocki" , , Andrew Morton , Dan Williams , Jonathan Cameron Subject: [PATCH 2/4] arm64: Support Generic Initiator only domains Date: Wed, 21 Aug 2019 22:52:40 +0800 Message-ID: <20190821145242.2330-3-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190821145242.2330-1-Jonathan.Cameron@huawei.com> References: <20190821145242.2330-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.123.41.22] X-CFilter-Loop: Reflected Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The one thing that currently needs doing from an architecture point of view is associating the GI domain with its nearest memory domain. This allows all the standard NUMA aware code to get a 'reasonable' answer. A clever driver might elect to do load balancing etc if there are multiple host / memory domains nearby, but that's a decision for the driver. Signed-off-by: Jonathan Cameron --- arch/arm64/kernel/smp.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 018a33e01b0e..7c11bc6cccf2 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -711,6 +711,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) { int err; unsigned int cpu; + unsigned int node; unsigned int this_cpu; init_cpu_topology(); @@ -749,6 +750,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus) set_cpu_present(cpu, true); numa_store_cpu_info(cpu); } + + /* + * Walk the numa domains and set the node to numa memory reference + * for any that are Generic Initiator Only. + */ + for_each_node_state(node, N_GENERIC_INITIATOR) + set_gi_numa_mem(node, local_memory_node(node)); } void (*__smp_cross_call)(const struct cpumask *, unsigned int);