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Fri, 31 Jul 2020 13:36:50 +0000 From: Akshu Agrawal To: akshu.agrawal@amd.com Cc: sboyd@kernel.org, rafael@kernel.org, rjw@rjwysocki.net, lenb@kernel.org, mturquette@baylibre.com, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, rahul.tanwar@linux.intel.com Subject: [v2 1/4] ACPI: APD: Change name from ST to FCH Date: Fri, 31 Jul 2020 19:06:01 +0530 Message-Id: <20200731133604.12512-2-akshu.agrawal@amd.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200731133604.12512-1-akshu.agrawal@amd.com> References: <20200731133604.12512-1-akshu.agrawal@amd.com> X-ClientProxiedBy: MAXPR01CA0072.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:49::14) To DM5PR1201MB0188.namprd12.prod.outlook.com (2603:10b6:4:56::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from local.mshome.net (122.179.42.211) by MAXPR01CA0072.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:49::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3239.16 via Frontend Transport; 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We can reuse the same clk handler support for other platforms. Hence, changing name from ST(SoC) to FCH(IP) Signed-off-by: Akshu Agrawal Acked-by: Stephen Boyd --- v2: pulled in clk changes so that patch compiles individually drivers/acpi/acpi_apd.c | 14 +++++++------- drivers/clk/x86/clk-st.c | 4 ++-- .../linux/platform_data/{clk-st.h => clk-fch.h} | 10 +++++----- 3 files changed, 14 insertions(+), 14 deletions(-) rename include/linux/platform_data/{clk-st.h => clk-fch.h} (53%) diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c index ba2612e9a0eb..2d99e46add1a 100644 --- a/drivers/acpi/acpi_apd.c +++ b/drivers/acpi/acpi_apd.c @@ -8,7 +8,7 @@ */ #include -#include +#include #include #include #include @@ -79,11 +79,11 @@ static int misc_check_res(struct acpi_resource *ares, void *data) return !acpi_dev_resource_memory(ares, &res); } -static int st_misc_setup(struct apd_private_data *pdata) +static int fch_misc_setup(struct apd_private_data *pdata) { struct acpi_device *adev = pdata->adev; struct platform_device *clkdev; - struct st_clk_data *clk_data; + struct fch_clk_data *clk_data; struct resource_entry *rentry; struct list_head resource_list; int ret; @@ -106,7 +106,7 @@ static int st_misc_setup(struct apd_private_data *pdata) acpi_dev_free_resource_list(&resource_list); - clkdev = platform_device_register_data(&adev->dev, "clk-st", + clkdev = platform_device_register_data(&adev->dev, "clk-fch", PLATFORM_DEVID_NONE, clk_data, sizeof(*clk_data)); return PTR_ERR_OR_ZERO(clkdev); @@ -135,8 +135,8 @@ static const struct apd_device_desc cz_uart_desc = { .properties = uart_properties, }; -static const struct apd_device_desc st_misc_desc = { - .setup = st_misc_setup, +static const struct apd_device_desc fch_misc_desc = { + .setup = fch_misc_setup, }; #endif @@ -239,7 +239,7 @@ static const struct acpi_device_id acpi_apd_device_ids[] = { { "AMD0020", APD_ADDR(cz_uart_desc) }, { "AMDI0020", APD_ADDR(cz_uart_desc) }, { "AMD0030", }, - { "AMD0040", APD_ADDR(st_misc_desc)}, + { "AMD0040", APD_ADDR(fch_misc_desc)}, #endif #ifdef CONFIG_ARM64 { "APMC0D0F", APD_ADDR(xgene_i2c_desc) }, diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c index 25d4b97aff9b..c2438874d9f2 100644 --- a/drivers/clk/x86/clk-st.c +++ b/drivers/clk/x86/clk-st.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include /* Clock Driving Strength 2 register */ @@ -31,7 +31,7 @@ static struct clk_hw *hws[ST_MAX_CLKS]; static int st_clk_probe(struct platform_device *pdev) { - struct st_clk_data *st_data; + struct fch_clk_data *st_data; st_data = dev_get_platdata(&pdev->dev); if (!st_data || !st_data->base) diff --git a/include/linux/platform_data/clk-st.h b/include/linux/platform_data/clk-fch.h similarity index 53% rename from include/linux/platform_data/clk-st.h rename to include/linux/platform_data/clk-fch.h index 7cdb6a402b35..850ca776156d 100644 --- a/include/linux/platform_data/clk-st.h +++ b/include/linux/platform_data/clk-fch.h @@ -1,17 +1,17 @@ /* SPDX-License-Identifier: MIT */ /* - * clock framework for AMD Stoney based clock + * clock framework for AMD misc clocks * * Copyright 2018 Advanced Micro Devices, Inc. */ -#ifndef __CLK_ST_H -#define __CLK_ST_H +#ifndef __CLK_FCH_H +#define __CLK_FCH_H #include -struct st_clk_data { +struct fch_clk_data { void __iomem *base; }; -#endif /* __CLK_ST_H */ +#endif /* __CLK_FCH_H */