From patchwork Mon Jan 15 10:10:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13519453 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29A65101C6 for ; Mon, 15 Jan 2024 10:11:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="I2GjGhO7" Received: by mail-pf1-f170.google.com with SMTP id d2e1a72fcca58-6d9f94b9186so7153524b3a.0 for ; Mon, 15 Jan 2024 02:11:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705313471; x=1705918271; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eFE4MaRUUDjQZfE2dmgya8wKXtM/DMaoZewAWiQUHuY=; b=I2GjGhO797yGThuRfk9JtlKXqOcpieEOVfZTeYJYeZR+Y71OpmThwJv5Vqvm6T3Xge enJwJUWRIwUE8rSIMuLpeBeNCPGf6iXyWXQrhhnj6+hpfQKsjRz0TbTmdCBjtmqm+jNB td/RbLxRM2xUB8NMH4NmAxrbLmZX6kD6mXBcJzHlrM7Xd4rZiWeg2BdKZg2nNmDPAcqO iRoVLwT0vrNnif+ygtbM7dynaRyecCN6QpIAjyMw8NjtxujDx0jRW88ceXQoNzmdar3f j/RNIwT5DSywGk0GS5cwE+kl4QwY3P3poDZXG1tFCzIr/B+DLmJZrlblVMvd4GLnLK4f XM1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705313471; x=1705918271; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eFE4MaRUUDjQZfE2dmgya8wKXtM/DMaoZewAWiQUHuY=; b=XvHsgsiZ93mBRCmVatgeYzWzXc90Yi0Ku+kX1xxTwz0qdJL3Yq4KsD9VTnxe5WuHmL noJ7wLQjJpAXEKcokTq92Cw2m+RldwENsJex/emJgbmRa+f4s/nMSjgdHKOu2385jXL8 e8TJBV+jlwviwHtVQOucJ3WwtSMFgm75xKgEkeQhhMeB4KWE+XASGsp/x8+8CIuziBR0 8pXKRQTWE5cx3alxSfax5Lkx3FUqCNb2v7Fw9+/xeRWj/Q653WP+ULnPrp6NnzOSBRfm iQOansb8MpQ6zj8uEBecGonJTF9NT13IO+8DBmqBGgVZPRkn1xsnQDg3PvOzpOXWpwg3 Zfbg== X-Gm-Message-State: AOJu0Yw+7AA/FXU+bdOF6iPfCpfNYX1k6tPAVhWkZY8GV7Rr1l9i6Es4 1fuAPQzc8H7zJMN9FN3kt1j1Jtz6dc63v4aZ/IzW1lloyOQTQA== X-Google-Smtp-Source: AGHT+IGwU6QEd/xe6D6PNl/zIoj9NPbivgiVZqhkEXmbNsIyplJguIzU6puQpGtsO9MGyB06M5Jzrg== X-Received: by 2002:a05:6a00:ace:b0:6da:c623:f054 with SMTP id c14-20020a056a000ace00b006dac623f054mr7200673pfl.15.1705313471628; Mon, 15 Jan 2024 02:11:11 -0800 (PST) Received: from localhost.localdomain ([106.51.188.200]) by smtp.gmail.com with ESMTPSA id u5-20020aa78385000000b006d9b8572e77sm7348256pfm.120.2024.01.15.02.11.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 02:11:11 -0800 (PST) From: Sunil V L To: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org Cc: "Rafael J . Wysocki" , Len Brown , Anup Patel , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Andrew Jones , Atish Kumar Patra , Pavel Machek , Sunil V L Subject: [PATCH v2 -next 1/3] cpuidle: RISC-V: Move few functions to arch/riscv Date: Mon, 15 Jan 2024 15:40:54 +0530 Message-Id: <20240115101056.429471-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115101056.429471-1-sunilvl@ventanamicro.com> References: <20240115101056.429471-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 To support ACPI Low Power Idle (LPI), few functions are required which are currently static functions in the DT based cpuidle driver. Hence, move them under arch/riscv so that ACPI driver also can use them. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- arch/riscv/include/asm/suspend.h | 3 ++ arch/riscv/kernel/suspend.c | 47 +++++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-riscv-sbi.c | 41 +------------------------ 3 files changed, 51 insertions(+), 40 deletions(-) diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h index 02f87867389a..5c7df5ab7a16 100644 --- a/arch/riscv/include/asm/suspend.h +++ b/arch/riscv/include/asm/suspend.h @@ -55,4 +55,7 @@ int hibernate_resume_nonboot_cpu_disable(void); asmlinkage void hibernate_restore_image(unsigned long resume_satp, unsigned long satp_temp, unsigned long cpu_resume); asmlinkage int hibernate_core_restore_code(void); +bool is_sbi_hsm_supported(void); +bool sbi_suspend_state_is_valid(u32 state); +int sbi_suspend(u32 state); #endif diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c index 239509367e42..a3b2e7e16a98 100644 --- a/arch/riscv/kernel/suspend.c +++ b/arch/riscv/kernel/suspend.c @@ -128,4 +128,51 @@ static int __init sbi_system_suspend_init(void) } arch_initcall(sbi_system_suspend_init); + +static int sbi_suspend_finisher(unsigned long suspend_type, + unsigned long resume_addr, + unsigned long opaque) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND, + suspend_type, resume_addr, opaque, 0, 0, 0); + + return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0; +} + +int sbi_suspend(u32 state) +{ + if (state & SBI_HSM_SUSP_NON_RET_BIT) + return cpu_suspend(state, sbi_suspend_finisher); + else + return sbi_suspend_finisher(state, 0, 0); +} + +bool sbi_suspend_state_is_valid(u32 state) +{ + if (state > SBI_HSM_SUSPEND_RET_DEFAULT && + state < SBI_HSM_SUSPEND_RET_PLATFORM) + return false; + if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT && + state < SBI_HSM_SUSPEND_NON_RET_PLATFORM) + return false; + return true; +} + +bool is_sbi_hsm_supported(void) +{ + /* + * The SBI HSM suspend function is only available when: + * 1) SBI version is 0.3 or higher + * 2) SBI HSM extension is available + */ + if (sbi_spec_version < sbi_mk_version(0, 3) || + !sbi_probe_extension(SBI_EXT_HSM)) { + pr_info("HSM suspend not available\n"); + return false; + } + + return true; +} #endif /* CONFIG_RISCV_SBI */ diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c index e8094fc92491..a7f06242f67b 100644 --- a/drivers/cpuidle/cpuidle-riscv-sbi.c +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c @@ -73,26 +73,6 @@ static inline bool sbi_is_domain_state_available(void) return data->available; } -static int sbi_suspend_finisher(unsigned long suspend_type, - unsigned long resume_addr, - unsigned long opaque) -{ - struct sbiret ret; - - ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND, - suspend_type, resume_addr, opaque, 0, 0, 0); - - return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0; -} - -static int sbi_suspend(u32 state) -{ - if (state & SBI_HSM_SUSP_NON_RET_BIT) - return cpu_suspend(state, sbi_suspend_finisher); - else - return sbi_suspend_finisher(state, 0, 0); -} - static __cpuidle int sbi_cpuidle_enter_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { @@ -206,17 +186,6 @@ static const struct of_device_id sbi_cpuidle_state_match[] = { { }, }; -static bool sbi_suspend_state_is_valid(u32 state) -{ - if (state > SBI_HSM_SUSPEND_RET_DEFAULT && - state < SBI_HSM_SUSPEND_RET_PLATFORM) - return false; - if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT && - state < SBI_HSM_SUSPEND_NON_RET_PLATFORM) - return false; - return true; -} - static int sbi_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "riscv,sbi-suspend-param", state); @@ -607,16 +576,8 @@ static int __init sbi_cpuidle_init(void) int ret; struct platform_device *pdev; - /* - * The SBI HSM suspend function is only available when: - * 1) SBI version is 0.3 or higher - * 2) SBI HSM extension is available - */ - if ((sbi_spec_version < sbi_mk_version(0, 3)) || - !sbi_probe_extension(SBI_EXT_HSM)) { - pr_info("HSM suspend not available\n"); + if (!is_sbi_hsm_supported()) return 0; - } ret = platform_driver_register(&sbi_cpuidle_driver); if (ret)