From patchwork Fri Nov 22 06:20:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lifeng Zheng X-Patchwork-Id: 13882777 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29CD7172BCE; Fri, 22 Nov 2024 06:21:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732256465; cv=none; b=GeEkhwT2CwHIe/cDyM5vXpiIMSHVdHtMaN0hy7RYhWYmaNqCtkmTE0P9DhLbvQrlVEbDJU5YknzvLL8E3zg45qo+wH/DNIkgOAIG2QVGuqXSiNsKPMmBQpnihkqYoT4F4kMuXspZwtk7kYsw3E/vIrqndM0o4gMINyUM6uwfTgg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732256465; c=relaxed/simple; bh=QQ6LrOCUEsxBPGEuK5GpLv4j/UI1sBjl6gPoIdltCz0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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Fri, 22 Nov 2024 14:20:53 +0800 From: Lifeng Zheng To: , , , CC: , , , , , , , , , , Subject: [PATCH v2 2/3] ACPI: CPPC: Add autonomous selection ABIs Date: Fri, 22 Nov 2024 14:20:50 +0800 Message-ID: <20241122062051.3658577-3-zhenglifeng1@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20241122062051.3658577-1-zhenglifeng1@huawei.com> References: <20241122062051.3658577-1-zhenglifeng1@huawei.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To kwepemh100008.china.huawei.com (7.202.181.93) cppc_set_epp - write energy performance preference register cppc_get_auto_act_window - read autonomous activity window register cppc_set_auto_act_window - write autonomous activity window register cppc_get_auto_sel - read autonomous selection enable register Signed-off-by: Lifeng Zheng --- drivers/acpi/cppc_acpi.c | 44 ++++++++++++++++++++++++++++++++++++++++ include/acpi/cppc_acpi.h | 20 ++++++++++++++++++ 2 files changed, 64 insertions(+) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 9aab22d8136a..48354d7d04bb 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -1588,6 +1588,50 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable) } EXPORT_SYMBOL_GPL(cppc_set_epp_perf); +/** + * cppc_set_epp() - Write the EPP register. + * @cpu: CPU on which to write register. + * @epp_val: Value to write to the EPP register. + */ +int cppc_set_epp(int cpu, u64 epp_val) +{ + return cppc_set_reg(cpu, ENERGY_PERF, epp_val); +} +EXPORT_SYMBOL_GPL(cppc_set_epp); + +/** + * cppc_get_auto_act_window() - Read autonomous activity window register. + * @cpu: CPU from which to read register. + * @auto_act_window: Return address. + */ +int cppc_get_auto_act_window(int cpu, u64 *auto_act_window) +{ + return cppc_get_reg(cpu, AUTO_ACT_WINDOW, auto_act_window); +} +EXPORT_SYMBOL_GPL(cppc_get_auto_act_window); + +/** + * cppc_set_auto_act_window() - Write autonomous activity window register. + * @cpu: CPU on which to write register. + * @auto_act_window: Value to write to the autonomous activity window register. + */ +int cppc_set_auto_act_window(int cpu, u64 auto_act_window) +{ + return cppc_set_reg(cpu, AUTO_ACT_WINDOW, auto_act_window); +} +EXPORT_SYMBOL_GPL(cppc_set_auto_act_window); + +/** + * cppc_get_auto_sel() - Read autonomous selection register. + * @cpu: CPU from which to read register. + * @auto_sel: Return address. + */ +int cppc_get_auto_sel(int cpu, u64 *auto_sel) +{ + return cppc_get_reg(cpu, AUTO_SEL_ENABLE, auto_sel); +} +EXPORT_SYMBOL_GPL(cppc_get_auto_sel); + /** * cppc_get_auto_sel_caps - Read autonomous selection register. * @cpunum : CPU from which to read register. diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index 62d368bcd9ec..134931b081a0 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -159,6 +159,10 @@ extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val); extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val); extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf); extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable); +extern int cppc_set_epp(int cpu, u64 epp_val); +extern int cppc_get_auto_act_window(int cpu, u64 *auto_act_window); +extern int cppc_set_auto_act_window(int cpu, u64 auto_act_window); +extern int cppc_get_auto_sel(int cpu, u64 *auto_sel); extern int cppc_get_auto_sel_caps(int cpunum, struct cppc_perf_caps *perf_caps); extern int cppc_set_auto_sel(int cpu, bool enable); extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf); @@ -225,6 +229,22 @@ static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, { return -EOPNOTSUPP; } +static inline int cppc_set_epp(int cpu, u64 epp_val) +{ + return -EOPNOTSUPP; +} +static inline int cppc_get_auto_act_window(int cpu, u64 *auto_act_window) +{ + return -EOPNOTSUPP; +} +static inline int cppc_set_auto_act_window(int cpu, u64 auto_act_window) +{ + return -EOPNOTSUPP; +} +static inline int cppc_get_auto_sel(int cpu, u64 *auto_sel) +{ + return -EOPNOTSUPP; +} static inline int cppc_get_epp_perf(int cpunum, u64 *epp_perf) { return -EOPNOTSUPP;