@@ -334,6 +334,8 @@ struct xe_device {
u8 has_sriov:1;
/** @info.has_usm: Device has unified shared memory support */
u8 has_usm:1;
+ /** @info.has_vrsr: Has capability to enter into VRAM self refresh */
+ u8 has_vrsr:1;
/** @info.is_dgfx: is discrete device */
u8 is_dgfx:1;
/**
@@ -68,6 +68,7 @@ struct xe_device_desc {
u8 has_llc:1;
u8 has_pxp:1;
u8 has_sriov:1;
+ u8 has_vrsr:1;
u8 skip_guc_pc:1;
u8 skip_mtcfg:1;
u8 skip_pcode:1;
@@ -343,6 +344,7 @@ static const struct xe_device_desc bmg_desc = {
.dma_mask_size = 46,
.has_display = true,
.has_fan_control = true,
+ .has_vrsr = true,
.has_heci_cscfi = 1,
};
@@ -589,6 +591,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.has_llc = desc->has_llc;
xe->info.has_pxp = desc->has_pxp;
xe->info.has_sriov = desc->has_sriov;
+ xe->info.has_vrsr = desc->has_vrsr;
xe->info.skip_guc_pc = desc->skip_guc_pc;
xe->info.skip_mtcfg = desc->skip_mtcfg;
xe->info.skip_pcode = desc->skip_pcode;