| Message ID | E1rVDnE-0027ZI-VR@rmk-PC.armlinux.org.uk (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | ACPI/arm64: add support for virtual cpu hotplug | expand |
On Wed, 31 Jan 2024 16:50:32 +0000 Russell King (Oracle) <rmk+kernel@armlinux.org.uk> wrote: > From: James Morse <james.morse@arm.com> > > To support virtual CPU hotplug, ACPI has added an 'online capable' bit > to the MADT GICC entries. This indicates a disabled CPU entry may not > be possible to online via PSCI until firmware has set enabled bit in > _STA. > > This means that a "usable" GIC is one that is marked as either enabled, > or online capable. Therefore, change acpi_gicc_is_usable() to check both > bits. However, we need to change the test in gic_acpi_match_gicc() back > to testing just the enabled bit so the count of enabled distributors is > correct. > > What about the redistributor in the GICC entry? ACPI doesn't want to say. > Assume the worst: When a redistributor is described in the GICC entry, > but the entry is marked as disabled at boot, assume the redistributor > is inaccessible. > > The GICv3 driver doesn't support late online of redistributors, so this > means the corresponding CPU can't be brought online either. Clear the > possible and present bits. > > Systems that want CPU hotplug in a VM can ensure their redistributors > are always-on, and describe them that way with a GICR entry in the MADT. > > When mapping redistributors found via GICC entries, handle the case > where the arch code believes the CPU is present and possible, but it > does not have an accessible redistributor. Print a warning and clear > the present and possible bits. > > Signed-off-by: James Morse <james.morse@arm.com> > Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 8deb671c4ff7..6d0f98d3540e 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -2370,11 +2370,25 @@ gic_acpi_parse_madt_gicc(union acpi_subtable_headers *header, (struct acpi_madt_generic_interrupt *)header; u32 reg = readl_relaxed(acpi_data.dist_base + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK; u32 size = reg == GIC_PIDR2_ARCH_GICv4 ? SZ_64K * 4 : SZ_64K * 2; + int cpu = get_cpu_for_acpi_id(gicc->uid); void __iomem *redist_base; if (!acpi_gicc_is_usable(gicc)) return 0; + /* + * Capable but disabled CPUs can be brought online later. What about + * the redistributor? ACPI doesn't want to say! + * Virtual hotplug systems can use the MADT's "always-on" GICR entries. + * Otherwise, prevent such CPUs from being brought online. + */ + if (!(gicc->flags & ACPI_MADT_ENABLED)) { + pr_warn_once("CPU %u's redistributor is inaccessible: this CPU can't be brought online\n", cpu); + set_cpu_present(cpu, false); + set_cpu_possible(cpu, false); + return 0; + } + redist_base = ioremap(gicc->gicr_base_address, size); if (!redist_base) return -ENOMEM; @@ -2420,9 +2434,12 @@ static int __init gic_acpi_match_gicc(union acpi_subtable_headers *header, /* * If GICC is enabled and has valid gicr base address, then it means - * GICR base is presented via GICC + * GICR base is presented via GICC. The redistributor is only known to + * be accessible if the GICC is marked as enabled. If this bit is not + * set, we'd need to add the redistributor at runtime, which isn't + * supported. */ - if (acpi_gicc_is_usable(gicc) && gicc->gicr_base_address) + if (gicc->flags & ACPI_MADT_ENABLED && gicc->gicr_base_address) acpi_data.enabled_rdists++; return 0; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 76ad43f7860b..cf018d42e632 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -239,7 +239,8 @@ void acpi_table_print_madt_entry (struct acpi_subtable_header *madt); static inline bool acpi_gicc_is_usable(struct acpi_madt_generic_interrupt *gicc) { - return gicc->flags & ACPI_MADT_ENABLED; + return gicc->flags & (ACPI_MADT_ENABLED | + ACPI_MADT_GICC_ONLINE_CAPABLE); } /* the following numa functions are architecture-dependent */