From patchwork Tue Aug 9 12:41:05 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lutomirski X-Patchwork-Id: 1049422 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p79CfiDZ021418 for ; Tue, 9 Aug 2011 12:41:44 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753598Ab1HIMlU (ORCPT ); Tue, 9 Aug 2011 08:41:20 -0400 Received: from DMZ-MAILSEC-SCANNER-8.MIT.EDU ([18.7.68.37]:61714 "EHLO dmz-mailsec-scanner-8.mit.edu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753180Ab1HIMlS (ORCPT ); Tue, 9 Aug 2011 08:41:18 -0400 X-AuditID: 12074425-b7b15ae000000f71-3d-4e412abd61f2 Received: from mailhub-auth-3.mit.edu ( [18.9.21.43]) by dmz-mailsec-scanner-8.mit.edu (Symantec Messaging Gateway) with SMTP id B8.28.03953.DBA214E4; Tue, 9 Aug 2011 08:40:29 -0400 (EDT) Received: from outgoing.mit.edu (OUTGOING-AUTH.MIT.EDU [18.7.22.103]) by mailhub-auth-3.mit.edu (8.13.8/8.9.2) with ESMTP id p79CfHld010295; Tue, 9 Aug 2011 08:41:17 -0400 Received: from localhost (207-172-69-77.c3-0.smr-ubr3.sbo-smr.ma.static.cable.rcn.com [207.172.69.77]) (authenticated bits=0) (User authenticated as luto@ATHENA.MIT.EDU) by outgoing.mit.edu (8.13.6/8.12.4) with ESMTP id p79CfFxX001138 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NOT); Tue, 9 Aug 2011 08:41:16 -0400 (EDT) From: Andy Lutomirski To: x86@kernel.org, linux-kernel@vger.kernel.org Cc: Fenghua Yu , Matthew Garrett , Len Brown , linux-acpi@vger.kernel.org, Ingo Molnar , Andy Lutomirski Subject: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS hasn't already Date: Tue, 9 Aug 2011 08:41:05 -0400 Message-Id: X-Mailer: git-send-email 1.7.6 In-Reply-To: References: In-Reply-To: References: X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJIsWRmVeSWpSXmKPExsUixCmqrbtXy9HPYNpJDou+K0fZLdqmOVrs fPiWzWL5vn5Gi8u75rBZbLnUzGpx9eFsFosfGx6zOnB43Gr7w+yxc9Zddo/Fe14yeWxa1cnm se7GV3aPz5vkAtiiuGxSUnMyy1KL9O0SuDJenv3LXHBUvOLuvVWsDYwThbsYOTkkBEwkbq/s YIKwxSQu3FvP1sXIxSEksI9R4se6BywgCSGB9YwSt7Z7QySeMkkcv7qfFSTBJqAi0bH0AVi3 iICBxJaVL1hBipgFrjBKXJx/gxkkISwQILF/3QVGEJtFQFWiteUQO4jNKxAkcWfBZWaI1XIS Ry4/BxvECTRozeS9zBCb9SUOT5rJgkt8AqPAAkaGVYyyKblVurmJmTnFqcm6xcmJeXmpRboW ermZJXqpKaWbGEEhzO6iuoNxwiGlQ4wCHIxKPLyc/A5+QqyJZcWVuYcYJTmYlER5n2g6+gnx JeWnVGYkFmfEF5XmpBYfYpTgYFYS4U3XAMrxpiRWVqUW5cOkpDlYlMR5X+8AmiSQnliSmp2a WpBaBJOV4eBQkuDNAMaqkGBRanpqRVpmTglCmomDE2Q4D9BwUZAa3uKCxNzizHSI/ClGRSlx XluQhABIIqM0D64XlmJeMYoDvSLMKwxSxQNMT3Ddr4AGMwENrr/jADK4JBEhJdXAaLE7Kql+ W9ssgXfRX4UDfk1YGHFpRtWcr3MtFZkU9f5JR398NiVt7vvCF09vTAs8qTj/xA/zyRVTLQOm b9i/Kv2SO++sReduRzqEbFy+dZb/4+P/4ic/X3yA8+vDr+snWOzjXf/TX3PuPffrmyS0n5dr lu2pvyW40LjggIzWMmDEVWSoi4e4b1BiKc5INNRiLipOBAAp9P5fDAMAAA== Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 09 Aug 2011 12:41:44 +0000 (UTC) Intel SDM volume 3A, 8.4.2 says: Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR. However, Intel recomments that system software always enable fast-string operation. The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this. Signed-off-by: Andy Lutomirski Signed-off-by: Fenghua Yu --- arch/x86/kernel/cpu/intel.c | 28 +++++++++++++++++++++++----- 1 files changed, 23 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index ed6086e..7d02873 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -30,6 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; + bool allow_fast_string = true; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { @@ -118,10 +119,11 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false; + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) { - printk(KERN_INFO "kmemcheck: Disabling fast string operations\n"); + printk_once(KERN_INFO "kmemcheck: Disabling fast string operations\n"); misc_enable &= ~MSR_IA32_MISC_ENABLE_FAST_STRING; wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable); @@ -130,13 +132,29 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) #endif /* - * If fast string is not enabled in IA32_MISC_ENABLE for any reason, - * clear the fast string and enhanced fast string CPU capabilities. + * If BIOS didn't enable fast string operation, try to enable + * it ourselves. If that fails, then clear the fast string + * and enhanced fast string CPU capabilities. */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + + if (allow_fast_string && + !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { + misc_enable |= MSR_IA32_MISC_ENABLE_FAST_STRING; + wrmsr_safe(MSR_IA32_MISC_ENABLE, (u32)misc_enable, + (u32)(misc_enable >> 32)); + + /* Re-read to make sure it stuck. */ + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + + if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) + printk_once(KERN_INFO FW_WARN "CPU #%d: IA32_MISC_ENABLE.FAST_STRING_ENABLE was not set", + c->cpu_index); + } + if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { - printk(KERN_INFO "Disabled fast string operations\n"); + printk_once(KERN_INFO "Failed to enable fast string operations\n"); setup_clear_cpu_cap(X86_FEATURE_REP_GOOD); setup_clear_cpu_cap(X86_FEATURE_ERMS); }