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[2003:dc:d73a:800:c9c8:a7be:2547:8d36]) by smtp.googlemail.com with ESMTPSA id h10sm18131127wrs.27.2019.04.01.11.18.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 01 Apr 2019 11:18:23 -0700 (PDT) From: Martin Blumenstingl To: thierry.reding@gmail.com, linux-pwm@vger.kernel.org, linux-amlogic@lists.infradead.org Subject: [PATCH 0/2] pwm: meson: two small bug-fixes Date: Mon, 1 Apr 2019 20:18:15 +0200 Message-Id: <20190401181817.11999-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190401_111825_566226_0612E6D2 X-CRM114-Status: GOOD ( 11.06 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bichao.zheng@amlogic.com, Martin Blumenstingl , narmstrong@baylibre.com, linux-kernel@vger.kernel.org, u.kleine-koenig@pengutronix.de, linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This series applies on top of my other fix "pwm: meson: fix scheduling while atomic issue" from [0] The first patch fixes an issue where the maximum possible pre-divider (128) could not be used because there was an off-by-one error in the code. I discovered this while testing with the longest supported period (349514407ns) when running from XTAL. This is verified to work on my Meson8b Odroid-C1 board using "pwm_b" on GPIOX_11. The second patch was suggested by Uwe Kleine-König but was actually implemented much earlier (back in mid 2018) by Bichao Zheng from Amlogic. This patch fixes changing the duty cycle by relying on the hardware to re-start the PWM output (instead of adding an artificial "constant LOW" of about 20ms - as measured by Bichao Zheng when stopping and re-starting the PWM output from within the driver). I tested this fix on my Meson8b Odroid-C1 board which uses a PWM driven CPU regulator (DVFS with all supported OPPs is still working fine for me, although I couldn't observe any issues before this patch). I also have some code-improvements queued which I'll send in the next days, see [1] [0] https://patchwork.kernel.org/cover/10880419/ [1] https://github.com/xdarklight/linux/commits/meson-pwm-for-5.2-v1 Bichao Zheng (1): pwm: meson: don't disable pwm when setting duty repeatedly Martin Blumenstingl (1): pwm: meson: consider 128 a valid pre-divider drivers/pwm/pwm-meson.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)