diff mbox

[u-boot,2/3] arm: meson: Add supplementary ethernet registers definitions

Message ID 1508313732-19282-3-git-send-email-narmstrong@baylibre.com (mailing list archive)
State Not Applicable
Headers show

Commit Message

Neil Armstrong Oct. 18, 2017, 8:02 a.m. UTC
On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Tom Rini Nov. 17, 2017, 3:43 p.m. UTC | #1
On Wed, Oct 18, 2017 at 10:02:11AM +0200, Neil Armstrong wrote:

> On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
> were added to configure the internal RMII PHY interface.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h
index ce41349..74d5290 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -22,11 +22,14 @@ 
 
 #define GXBB_ETH_REG_0		GXBB_PERIPHS_ADDR(0x50)
 #define GXBB_ETH_REG_1		GXBB_PERIPHS_ADDR(0x51)
+#define GXBB_ETH_REG_2		GXBB_PERIPHS_ADDR(0x56)
+#define GXBB_ETH_REG_3		GXBB_PERIPHS_ADDR(0x57)
 
 #define GXBB_ETH_REG_0_PHY_INTF		BIT(0)
 #define GXBB_ETH_REG_0_TX_PHASE(x)	(((x) & 3) << 5)
 #define GXBB_ETH_REG_0_TX_RATIO(x)	(((x) & 7) << 7)
 #define GXBB_ETH_REG_0_PHY_CLK_EN	BIT(10)
+#define GXBB_ETH_REG_0_INVERT_RMII_CLK	BIT(11)
 #define GXBB_ETH_REG_0_CLK_EN		BIT(12)
 
 /* HIU registers */