From patchwork Tue Sep 3 06:51:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianxin Pan X-Patchwork-Id: 11127273 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CE5F71399 for ; Tue, 3 Sep 2019 06:54:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AB851216C8 for ; Tue, 3 Sep 2019 06:54:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iF9wbquD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AB851216C8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amlogic.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NwwUsC/eCIwtTXo/aKQwFE2k+3XpZYuDtoacTuJntVY=; b=iF9wbquDDtLvoB 8KDv7esMnFawYTwoom2MXqlq00RyNwoNYEG/0n03rUpvDfqQF5e/8qVXN7rwE2aKtNeY2ez4WGwgn c0nif7NemNehBycHZyokdLDaNURDRHKUYYzwpr9TGV6CGgcJ0pEpol89OH3R7SpPzz+SxTcGo7DKw TfLaO+wpLNzBuCDezKc4MHo+Ss6/RnXQTz5wE+h9Sy5yWonj0BExvgRLHMZsRQkcaUfkJlMM0lPAN 5zaDeW9Zipt2LiT/guXxyGkKAbLReOyY1E8+sl2/ZNVswHWMyXuTHOdPJ7hhYJdLJ7JiBUic0sz3F QwE44RiEvNthq1OGvGMw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i52hX-0000TA-Py; Tue, 03 Sep 2019 06:54:03 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i52fH-0007NR-CM; Tue, 03 Sep 2019 06:51:45 +0000 Received: from droid13.amlogic.com (116.236.93.172) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.1591.10; Tue, 3 Sep 2019 14:52:14 +0800 From: Jianxin Pan To: Kevin Hilman , Subject: [PATCH 4/4] arm64: dts: add support for A1 based Amlogic AD401 Date: Tue, 3 Sep 2019 02:51:15 -0400 Message-ID: <1567493475-75451-5-git-send-email-jianxin.pan@amlogic.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567493475-75451-1-git-send-email-jianxin.pan@amlogic.com> References: <1567493475-75451-1-git-send-email-jianxin.pan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [116.236.93.172] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190902_235144_031060_DE41770D X-CRM114-Status: GOOD ( 11.53 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Hanjie Lin , Victor Wan , Jianxin Pan , Neil Armstrong , Martin Blumenstingl , linux-kernel@vger.kernel.org, Qiufang Dai , Rob Herring , Jian Hu , Xingyu Chen , Carlo Caione , Tao Zeng , linux-arm-kernel@lists.infradead.org, Jerome Brunet Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org Add basic support for the Amlogic A1 based Amlogic AD401 board: which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan Reviewed-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts | 30 ++++++ arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 121 +++++++++++++++++++++++++ 3 files changed, 152 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index edbf128..1720c45 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -36,3 +36,4 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts b/arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts new file mode 100644 index 00000000..3c05cc0 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "meson-a1.dtsi" + +/ { + compatible = "amlogic,ad401", "amlogic,a1"; + model = "Amlogic Meson A1 AD401 Development Board"; + + aliases { + serial0 = &uart_AO_B; + }; + chosen { + stdout-path = "serial0:115200n8"; + }; + memory@0 { + device_type = "memory"; + linux,usable-memory = <0x0 0x0 0x0 0x8000000>; + }; +}; + +&uart_AO_B { + status = "okay"; + /*pinctrl-0 = <&uart_ao_a_pins>;*/ + /*pinctrl-names = "default";*/ +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi new file mode 100644 index 00000000..b98d648 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + */ + +#include +#include + +/ { + compatible = "amlogic,a1"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x800000>; + alignment = <0x0 0x400000>; + linux,cma-default; + }; + }; + + sm: secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart_AO: serial@fe001c00 { + compatible = "amlogic,meson-gx-uart", + "amlogic,meson-ao-uart"; + reg = <0x0 0xfe001c00 0x0 0x18>; + interrupts = ; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial@fe002000 { + compatible = "amlogic,meson-gx-uart", + "amlogic,meson-ao-uart"; + reg = <0x0 0xfe002000 0x0 0x18>; + interrupts = ; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + gic: interrupt-controller@ff901000 { + compatible = "arm,gic-400"; + reg = <0x0 0xff901000 0x0 0x1000>, + <0x0 0xff902000 0x0 0x2000>, + <0x0 0xff904000 0x0 0x2000>, + <0x0 0xff906000 0x0 0x2000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; +};