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[2003:dc:d3cb:9604:519c:e50e:19b6:2432]) by smtp.googlemail.com with ESMTPSA id ub8sm12789572wjc.39.2016.09.11.05.39.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Sep 2016 05:39:16 -0700 (PDT) From: Martin Blumenstingl To: linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org, linus.walleij@linaro.org, khilman@baylibre.com, carlo@caione.org Subject: [PATCH v2 2/2] ARM64: dts: meson-gxbb: add the SDIO pins Date: Sun, 11 Sep 2016 14:39:03 +0200 Message-Id: <20160911123903.20027-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160911123903.20027-1-martin.blumenstingl@googlemail.com> References: <20160828164725.19429-1-martin.blumenstingl@googlemail.com> <20160911123903.20027-1-martin.blumenstingl@googlemail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160911_053936_574230_F82F5C14 X-CRM114-Status: UNSURE ( 8.29 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, Neil Armstrong MIME-Version: 1.0 Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Neil Armstrong This is used to configure the pins of the sd_emmc_a controller to which an SDIO module is connected (when available). Signed-off-by: Neil Armstrong Tested-by: Martin Blumenstingl --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index c84cacf..fe2a1fc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -394,6 +394,25 @@ }; }; + sdio_pins: sdio { + mux { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", + "sdio_cmd", + "sdio_clk"; + function = "sdio"; + }; + }; + + sdio_irq_pins: sdio_irq { + mux { + groups = "sdio_irq"; + function = "sdio"; + }; + }; + uart_a_pins: uart_a { mux { groups = "uart_tx_a",