diff mbox

[v2,3/3] pwm: meson: improve pwm calculation precision.

Message ID 20170608122416.1993-4-jbrunet@baylibre.com (mailing list archive)
State Not Applicable
Headers show

Commit Message

Jerome Brunet June 8, 2017, 12:24 p.m. UTC
When using input clocks with high rates, such as clk81 (166MHz), the
fin_ns = NSEC_PER_SEC / fin_freq can introduce a significant error.

Ex: fin_freq = 166666667, NSEC_PER_SEC = 1000000000
    fin_ns = 5,9999999

which is, of course, rounded down to 5. This introduce an error of ~20%
on the period requested from the pwm.

This patch use ps instead of ns (and 64bits integer) to perform the
calculation. This should give a good enough precision.

Fixes: 211ed630753d ("pwm: Add support for Meson PWM Controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/pwm/pwm-meson.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

Comments

Neil Armstrong June 8, 2017, 12:35 p.m. UTC | #1
On 06/08/2017 02:24 PM, Jerome Brunet wrote:
> When using input clocks with high rates, such as clk81 (166MHz), the
> fin_ns = NSEC_PER_SEC / fin_freq can introduce a significant error.
> 
> Ex: fin_freq = 166666667, NSEC_PER_SEC = 1000000000
>     fin_ns = 5,9999999
> 
> which is, of course, rounded down to 5. This introduce an error of ~20%
> on the period requested from the pwm.
> 
> This patch use ps instead of ns (and 64bits integer) to perform the
> calculation. This should give a good enough precision.
> 
> Fixes: 211ed630753d ("pwm: Add support for Meson PWM Controller")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/pwm/pwm-meson.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> index b911a944744a..4cdc66f7f718 100644
> --- a/drivers/pwm/pwm-meson.c
> +++ b/drivers/pwm/pwm-meson.c
> @@ -163,7 +163,8 @@ static int meson_pwm_calc(struct meson_pwm *meson,
>  			  unsigned int duty, unsigned int period)
>  {
>  	unsigned int pre_div, cnt, duty_cnt;
> -	unsigned long fin_freq = -1, fin_ns;
> +	unsigned long fin_freq = -1;
> +	u64 fin_ps;
>  
>  	if (~(meson->inverter_mask >> id) & 0x1)
>  		duty = period - duty;
> @@ -179,13 +180,14 @@ static int meson_pwm_calc(struct meson_pwm *meson,
>  	}
>  
>  	dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq);
> -	fin_ns = NSEC_PER_SEC / fin_freq;
> +	fin_ps = ((u64)NSEC_PER_SEC * 1000) / fin_freq;
>  
>  	/* Calc pre_div with the period */
>  	for (pre_div = 0; pre_div < MISC_CLK_DIV_MASK; pre_div++) {
> -		cnt = DIV_ROUND_CLOSEST(period, fin_ns * (pre_div + 1));
> -		dev_dbg(meson->chip.dev, "fin_ns=%lu pre_div=%u cnt=%u\n",
> -			fin_ns, pre_div, cnt);
> +		cnt = DIV_ROUND_CLOSEST_ULL((u64)period * 1000,
> +					    fin_ps * (pre_div + 1));
> +		dev_dbg(meson->chip.dev, "fin_ps=%llu pre_div=%u cnt=%u\n",
> +			fin_ps, pre_div, cnt);
>  		if (cnt <= 0xffff)
>  			break;
>  	}
> @@ -208,7 +210,8 @@ static int meson_pwm_calc(struct meson_pwm *meson,
>  		channel->lo = cnt;
>  	} else {
>  		/* Then check is we can have the duty with the same pre_div */
> -		duty_cnt = DIV_ROUND_CLOSEST(duty, fin_ns * (pre_div + 1));
> +		duty_cnt = DIV_ROUND_CLOSEST_ULL((u64)duty * 1000,
> +						 fin_ps * (pre_div + 1));
>  		if (duty_cnt > 0xffff) {
>  			dev_err(meson->chip.dev, "unable to get duty cycle\n");
>  			return -EINVAL;
> 

Great, I missed this !!

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Thierry Reding July 6, 2017, 9:21 p.m. UTC | #2
On Thu, Jun 08, 2017 at 02:24:16PM +0200, Jerome Brunet wrote:
> When using input clocks with high rates, such as clk81 (166MHz), the
> fin_ns = NSEC_PER_SEC / fin_freq can introduce a significant error.
> 
> Ex: fin_freq = 166666667, NSEC_PER_SEC = 1000000000
>     fin_ns = 5,9999999
> 
> which is, of course, rounded down to 5. This introduce an error of ~20%
> on the period requested from the pwm.
> 
> This patch use ps instead of ns (and 64bits integer) to perform the
> calculation. This should give a good enough precision.
> 
> Fixes: 211ed630753d ("pwm: Add support for Meson PWM Controller")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/pwm/pwm-meson.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> index b911a944744a..4cdc66f7f718 100644
> --- a/drivers/pwm/pwm-meson.c
> +++ b/drivers/pwm/pwm-meson.c
> @@ -163,7 +163,8 @@ static int meson_pwm_calc(struct meson_pwm *meson,
>  			  unsigned int duty, unsigned int period)
>  {
>  	unsigned int pre_div, cnt, duty_cnt;
> -	unsigned long fin_freq = -1, fin_ns;
> +	unsigned long fin_freq = -1;
> +	u64 fin_ps;
>  
>  	if (~(meson->inverter_mask >> id) & 0x1)
>  		duty = period - duty;
> @@ -179,13 +180,14 @@ static int meson_pwm_calc(struct meson_pwm *meson,
>  	}
>  
>  	dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq);
> -	fin_ns = NSEC_PER_SEC / fin_freq;
> +	fin_ps = ((u64)NSEC_PER_SEC * 1000) / fin_freq;

This failed to build, so I had to change this division to a do_div().

Thierry
Jerome Brunet July 7, 2017, 8:57 a.m. UTC | #3
On Thu, 2017-07-06 at 23:21 +0200, Thierry Reding wrote:
> On Thu, Jun 08, 2017 at 02:24:16PM +0200, Jerome Brunet wrote:
> > When using input clocks with high rates, such as clk81 (166MHz), the
> > fin_ns = NSEC_PER_SEC / fin_freq can introduce a significant error.
> > 
> > Ex: fin_freq = 166666667, NSEC_PER_SEC = 1000000000
> >     fin_ns = 5,9999999
> > 
> > which is, of course, rounded down to 5. This introduce an error of ~20%
> > on the period requested from the pwm.
> > 
> > This patch use ps instead of ns (and 64bits integer) to perform the
> > calculation. This should give a good enough precision.
> > 
> > Fixes: 211ed630753d ("pwm: Add support for Meson PWM Controller")
> > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > ---
> >  drivers/pwm/pwm-meson.c | 15 +++++++++------
> >  1 file changed, 9 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> > index b911a944744a..4cdc66f7f718 100644
> > --- a/drivers/pwm/pwm-meson.c
> > +++ b/drivers/pwm/pwm-meson.c
> > @@ -163,7 +163,8 @@ static int meson_pwm_calc(struct meson_pwm *meson,
> >  			  unsigned int duty, unsigned int period)
> >  {
> >  	unsigned int pre_div, cnt, duty_cnt;
> > -	unsigned long fin_freq = -1, fin_ns;
> > +	unsigned long fin_freq = -1;
> > +	u64 fin_ps;
> >  
> >  	if (~(meson->inverter_mask >> id) & 0x1)
> >  		duty = period - duty;
> > @@ -179,13 +180,14 @@ static int meson_pwm_calc(struct meson_pwm *meson,
> >  	}
> >  
> >  	dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq);
> > -	fin_ns = NSEC_PER_SEC / fin_freq;
> > +	fin_ps = ((u64)NSEC_PER_SEC * 1000) / fin_freq;
> 
> This failed to build, so I had to change this division to a do_div().

Oh ! Indeed :(
I have mostly tested with arm64 which is fine.
I thought I had tested arm(32) build as well but I just noticed that MESON_PWM
option is disabled in multi_v7_defconfig. 

Thanks for catching and fixing this Thierry !


> 
> Thierry
diff mbox

Patch

diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index b911a944744a..4cdc66f7f718 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -163,7 +163,8 @@  static int meson_pwm_calc(struct meson_pwm *meson,
 			  unsigned int duty, unsigned int period)
 {
 	unsigned int pre_div, cnt, duty_cnt;
-	unsigned long fin_freq = -1, fin_ns;
+	unsigned long fin_freq = -1;
+	u64 fin_ps;
 
 	if (~(meson->inverter_mask >> id) & 0x1)
 		duty = period - duty;
@@ -179,13 +180,14 @@  static int meson_pwm_calc(struct meson_pwm *meson,
 	}
 
 	dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq);
-	fin_ns = NSEC_PER_SEC / fin_freq;
+	fin_ps = ((u64)NSEC_PER_SEC * 1000) / fin_freq;
 
 	/* Calc pre_div with the period */
 	for (pre_div = 0; pre_div < MISC_CLK_DIV_MASK; pre_div++) {
-		cnt = DIV_ROUND_CLOSEST(period, fin_ns * (pre_div + 1));
-		dev_dbg(meson->chip.dev, "fin_ns=%lu pre_div=%u cnt=%u\n",
-			fin_ns, pre_div, cnt);
+		cnt = DIV_ROUND_CLOSEST_ULL((u64)period * 1000,
+					    fin_ps * (pre_div + 1));
+		dev_dbg(meson->chip.dev, "fin_ps=%llu pre_div=%u cnt=%u\n",
+			fin_ps, pre_div, cnt);
 		if (cnt <= 0xffff)
 			break;
 	}
@@ -208,7 +210,8 @@  static int meson_pwm_calc(struct meson_pwm *meson,
 		channel->lo = cnt;
 	} else {
 		/* Then check is we can have the duty with the same pre_div */
-		duty_cnt = DIV_ROUND_CLOSEST(duty, fin_ns * (pre_div + 1));
+		duty_cnt = DIV_ROUND_CLOSEST_ULL((u64)duty * 1000,
+						 fin_ps * (pre_div + 1));
 		if (duty_cnt > 0xffff) {
 			dev_err(meson->chip.dev, "unable to get duty cycle\n");
 			return -EINVAL;