diff mbox

[07/13] ARM: dts: meson8: add the pins for the SDIO controller

Message ID 20170611101644.28581-8-martin.blumenstingl@googlemail.com (mailing list archive)
State Superseded
Headers show

Commit Message

Martin Blumenstingl June 11, 2017, 10:16 a.m. UTC
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

Neil Armstrong June 12, 2017, 7:32 a.m. UTC | #1
On 06/11/2017 12:16 PM, Martin Blumenstingl wrote:
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  arch/arm/boot/dts/meson8.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
> index 93e437c91c61..1bbfc04c3f10 100644
> --- a/arch/arm/boot/dts/meson8.dtsi
> +++ b/arch/arm/boot/dts/meson8.dtsi
> @@ -158,6 +158,30 @@
>  			gpio-ranges = <&pinctrl_cbus 0 0 120>;
>  		};
>  
> +		sd_a_pins: sd-a {
> +			mux {
> +				groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",
> +					"sd_d3_a", "sd_clk_a", "sd_cmd_a";
> +				function = "sd_a";
> +			};
> +		};
> +
> +		sd_b_pins: sd-b {
> +			mux {
> +				groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
> +					"sd_d3_b", "sd_clk_b", "sd_cmd_b";
> +				function = "sd_b";
> +			};
> +		};
> +
> +		sd_c_pins: sd-c {
> +			mux {
> +				groups = "sd_d0_c", "sd_d1_c", "sd_d2_c",
> +					"sd_d3_c", "sd_clk_c", "sd_cmd_c";
> +				function = "sd_c";
> +			};
> +		};
> +
>  		spi_nor_pins: nor {
>  			mux {
>  				groups = "nor_d", "nor_q", "nor_c", "nor_cs";
> 

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
diff mbox

Patch

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 93e437c91c61..1bbfc04c3f10 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -158,6 +158,30 @@ 
 			gpio-ranges = <&pinctrl_cbus 0 0 120>;
 		};
 
+		sd_a_pins: sd-a {
+			mux {
+				groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",
+					"sd_d3_a", "sd_clk_a", "sd_cmd_a";
+				function = "sd_a";
+			};
+		};
+
+		sd_b_pins: sd-b {
+			mux {
+				groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
+					"sd_d3_b", "sd_clk_b", "sd_cmd_b";
+				function = "sd_b";
+			};
+		};
+
+		sd_c_pins: sd-c {
+			mux {
+				groups = "sd_d0_c", "sd_d1_c", "sd_d2_c",
+					"sd_d3_c", "sd_clk_c", "sd_cmd_c";
+				function = "sd_c";
+			};
+		};
+
 		spi_nor_pins: nor {
 			mux {
 				groups = "nor_d", "nor_q", "nor_c", "nor_cs";