| Message ID | 20180225113854.20731-4-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
On Sun, 2018-02-25 at 12:38 +0100, Martin Blumenstingl wrote: > Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b > because it only provides 83 GPIOs. > The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h > inherited all GPIOs from Meson8 until recently. However, Meson8b does > not support all GPIOs which are supported by Meson8 (Meson8b doesn't > have a GPIOZ bank, most of the pins from the GPIODV bank are missing on > Meson8b - just to name a few differences). > > The actual number of GPIOs is only 83, instead of 120 from Meson8 plus > the 10 GPIOs from the DIF bank on Meson8b. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> > --- > arch/arm/boot/dts/meson8b.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi > index 5f7841b2d163..9fa77975354b 100644 > --- a/arch/arm/boot/dts/meson8b.dtsi > +++ b/arch/arm/boot/dts/meson8b.dtsi > @@ -183,7 +183,7 @@ > reg-names = "mux", "pull", "pull-enable", "gpio"; > gpio-controller; > #gpio-cells = <2>; > - gpio-ranges = <&pinctrl_cbus 0 0 130>; > + gpio-ranges = <&pinctrl_cbus 0 0 83>; > }; > > eth_rgmii_pins: eth-rgmii {
On Sun, Feb 25, 2018 at 12:38 PM, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b > because it only provides 83 GPIOs. > The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h > inherited all GPIOs from Meson8 until recently. However, Meson8b does > not support all GPIOs which are supported by Meson8 (Meson8b doesn't > have a GPIOZ bank, most of the pins from the GPIODV bank are missing on > Meson8b - just to name a few differences). > > The actual number of GPIOs is only 83, instead of 120 from Meson8 plus > the 10 GPIOs from the DIF bank on Meson8b. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Please funnel this through the ARM SoC tree. If it is closesly associated with patch 1/2 and need to go in together with it, I can merge it if some ARM SoC maintainer can provide an ACK. Yours, Linus Walleij
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 5f7841b2d163..9fa77975354b 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -183,7 +183,7 @@ reg-names = "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinctrl_cbus 0 0 130>; + gpio-ranges = <&pinctrl_cbus 0 0 83>; }; eth_rgmii_pins: eth-rgmii {
Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b because it only provides 83 GPIOs. The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h inherited all GPIOs from Meson8 until recently. However, Meson8b does not support all GPIOs which are supported by Meson8 (Meson8b doesn't have a GPIOZ bank, most of the pins from the GPIODV bank are missing on Meson8b - just to name a few differences). The actual number of GPIOs is only 83, instead of 120 from Meson8 plus the 10 GPIOs from the DIF bank on Meson8b. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8b.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)