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[v2,1/2] clk: meson-axg: add pcie and mipi clock bindings

Message ID 20180702213118.19222-2-yixun.lan@amlogic.com (mailing list archive)
State Not Applicable
Headers show

Commit Message

Yixun Lan July 2, 2018, 9:31 p.m. UTC 
Add the pcie and mipi clock dt-bindings for the pcie driver.

Since the mipi clock isalso used by the pcie driver,
we add it together in this patch.

Tested-by: Jianxin Qin <jianxin.qin@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 include/dt-bindings/clock/axg-clkc.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Jerome Brunet July 3, 2018, 9:20 a.m. UTC | #1 
On Mon, 2018-07-02 at 21:31 +0000, Yixun Lan wrote:
> Add the pcie and mipi clock dt-bindings for the pcie driver.
> 
> Since the mipi clock isalso used by the pcie driver,
> we add it together in this patch.
> 
> Tested-by: Jianxin Qin <jianxin.qin@amlogic.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  include/dt-bindings/clock/axg-clkc.h | 3 +++
>  1 file changed, 3 insertions(+)

Applied. Thx
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Patch

diff --git a/include/dt-bindings/clock/axg-clkc.h b/include/dt-bindings/clock/axg-clkc.h
index 555937a25504..70371228b7e0 100644
--- a/include/dt-bindings/clock/axg-clkc.h
+++ b/include/dt-bindings/clock/axg-clkc.h
@@ -68,5 +68,8 @@ 
 #define CLKID_SD_EMMC_B_CLK0			59
 #define CLKID_SD_EMMC_C_CLK0			60
 #define CLKID_HIFI_PLL				69
+#define CLKID_PCIE_CML_EN0			79
+#define CLKID_PCIE_CML_EN1			80
+#define CLKID_MIPI_ENABLE			81
 
 #endif /* __AXG_CLKC_H */