diff mbox series

clk: meson: fix pll settings calculation with arm32

Message ID 20190203104716.10479-1-jbrunet@baylibre.com (mailing list archive)
State Not Applicable
Delegated to: Neil Armstrong
Headers show
Series clk: meson: fix pll settings calculation with arm32 | expand

Commit Message

Jerome Brunet Feb. 3, 2019, 10:47 a.m. UTC
fix undefined reference to `__aeabi_uldivmod' when dividing
u64 on arm32.

Fixes: 496c0462b46f ("clk: meson: pll: update driver for the g12a")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---

 Neil,

 Feel free to squash this with the offending change. If you prefer,
 I can submit a v7.

 Cheers
 Jerome

 drivers/clk/meson/clk-pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Neil Armstrong Feb. 4, 2019, 8:54 a.m. UTC | #1
On 03/02/2019 11:47, Jerome Brunet wrote:
> fix undefined reference to `__aeabi_uldivmod' when dividing
> u64 on arm32.
> 
> Fixes: 496c0462b46f ("clk: meson: pll: update driver for the g12a")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> 
>  Neil,
> 
>  Feel free to squash this with the offending change. If you prefer,
>  I can submit a v7.
> 
>  Cheers
>  Jerome
> 
>  drivers/clk/meson/clk-pll.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
> index 7946d21a4ff4..41e16dd7272a 100644
> --- a/drivers/clk/meson/clk-pll.c
> +++ b/drivers/clk/meson/clk-pll.c
> @@ -151,7 +151,7 @@ static unsigned int meson_clk_get_pll_range_m(unsigned long rate,
>  	if (__pll_round_closest_mult(pll))
>  		return DIV_ROUND_CLOSEST_ULL(val, parent_rate);
>  
> -	return val / parent_rate;
> +	return div_u64(val,  parent_rate);
>  }
>  
>  static int meson_clk_get_pll_range_index(unsigned long rate,
> 

Thanks for the fix,

I squashed it on "clk: meson: pll: update driver for the g12a"

Neil
diff mbox series

Patch

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 7946d21a4ff4..41e16dd7272a 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -151,7 +151,7 @@  static unsigned int meson_clk_get_pll_range_m(unsigned long rate,
 	if (__pll_round_closest_mult(pll))
 		return DIV_ROUND_CLOSEST_ULL(val, parent_rate);
 
-	return val / parent_rate;
+	return div_u64(val,  parent_rate);
 }
 
 static int meson_clk_get_pll_range_index(unsigned long rate,