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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id a14sm2131900wrx.96.2019.03.15.06.57.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Mar 2019 06:57:00 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com Subject: [PATCH v2 2/2] arm64: dts: meson-gxm: Add Mali-T820 node Date: Fri, 15 Mar 2019 14:56:55 +0100 Message-Id: <20190315135655.28359-3-narmstrong@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190315135655.28359-1-narmstrong@baylibre.com> References: <20190315135655.28359-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190315_065702_779922_587BAB1F X-CRM114-Status: GOOD ( 11.48 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Christian Hewitt , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christian Hewitt The Amlogic Meson GXM SoC embeds an ARM Mali T820 GPU. This patch adds the node with all the needed properties to power on the GPU. This has been tested with the work-in-progress PanFrost project aiming support for ARM Mali Midgard and later GPUs. Signed-off-by: Christian Hewitt Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index 247888d68a3a..35e59d390903 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi @@ -91,6 +91,33 @@ reset-names = "phy"; status = "okay"; }; + + mali: gpu@c0000 { + compatible = "amlogic,meson-gxm-mali", "arm,mali-t820"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + interrupt-names = "gpu", "mmu", "job"; + clocks = <&clkc CLKID_MALI>; + resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; }; &clkc_AO {