diff mbox series

clk: meson: g12a: fix VPU clock muxes mask

Message ID 20190319082611.6215-1-mjourdan@baylibre.com (mailing list archive)
State Not Applicable
Delegated to: Neil Armstrong
Headers show
Series clk: meson: g12a: fix VPU clock muxes mask | expand

Commit Message

Maxime Jourdan March 19, 2019, 8:26 a.m. UTC
There are 8 parents, use 0x7

Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
---
 drivers/clk/meson/g12a.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Neil Armstrong March 19, 2019, 8:32 a.m. UTC | #1
On 19/03/2019 09:26, Maxime Jourdan wrote:
> There are 8 parents, use 0x7
> 
> Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
> ---
>  drivers/clk/meson/g12a.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
> index cfb91df884cb..e52b0b53f398 100644
> --- a/drivers/clk/meson/g12a.c
> +++ b/drivers/clk/meson/g12a.c
> @@ -1391,7 +1391,7 @@ static const char * const g12a_vpu_parent_names[] = {
>  static struct clk_regmap g12a_vpu_0_sel = {
>  	.data = &(struct clk_regmap_mux_data){
>  		.offset = HHI_VPU_CLK_CNTL,
> -		.mask = 0x3,
> +		.mask = 0x7,
>  		.shift = 9,
>  	},
>  	.hw.init = &(struct clk_init_data){
> @@ -1435,7 +1435,7 @@ static struct clk_regmap g12a_vpu_0 = {
>  static struct clk_regmap g12a_vpu_1_sel = {
>  	.data = &(struct clk_regmap_mux_data){
>  		.offset = HHI_VPU_CLK_CNTL,
> -		.mask = 0x3,
> +		.mask = 0x7,
>  		.shift = 25,
>  	},
>  	.hw.init = &(struct clk_init_data){
> 

Good catch !

I'll apply on fixes/drivers

Neil
diff mbox series

Patch

diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index cfb91df884cb..e52b0b53f398 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -1391,7 +1391,7 @@  static const char * const g12a_vpu_parent_names[] = {
 static struct clk_regmap g12a_vpu_0_sel = {
 	.data = &(struct clk_regmap_mux_data){
 		.offset = HHI_VPU_CLK_CNTL,
-		.mask = 0x3,
+		.mask = 0x7,
 		.shift = 9,
 	},
 	.hw.init = &(struct clk_init_data){
@@ -1435,7 +1435,7 @@  static struct clk_regmap g12a_vpu_0 = {
 static struct clk_regmap g12a_vpu_1_sel = {
 	.data = &(struct clk_regmap_mux_data){
 		.offset = HHI_VPU_CLK_CNTL,
-		.mask = 0x3,
+		.mask = 0x7,
 		.shift = 25,
 	},
 	.hw.init = &(struct clk_init_data){