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[2003:f1:33dd:a400:b42d:8eb9:d711:c35e]) by smtp.googlemail.com with ESMTPSA id h14sm2007731wrs.66.2019.06.09.11.06.37 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sun, 09 Jun 2019 11:06:38 -0700 (PDT) From: Martin Blumenstingl To: netdev@vger.kernel.org, linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, joabreu@synopsys.com Subject: [RFC next v1 2/5] gpio: of: parse stmmac PHY reset line specific active-low property Date: Sun, 9 Jun 2019 20:06:18 +0200 Message-Id: <20190609180621.7607-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190609180621.7607-1-martin.blumenstingl@googlemail.com> References: <20190609180621.7607-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190609_110641_106050_CF185186 X-CRM114-Status: GOOD ( 11.83 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, narmstrong@baylibre.com, Martin Blumenstingl , khilman@baylibre.com, linux-kernel@vger.kernel.org, davem@davemloft.net, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The stmmac driver currently ignores the GPIO flags which are passed via devicetree because it operates with legacy GPIO numbers instead of GPIO descriptors. stmmac assumes that the GPIO is "active HIGH" by default. This can be overwritten by setting "snps,reset-active-low" to make the reset line "active LOW". Recent Amlogic SoCs (G12A which includes S905X2 and S905D2 as well as G12B which includes S922X) use GPIOZ_14 or GPIOZ_15 for the PHY reset line. These GPIOs are special because they are marked as "3.3V input tolerant open drain" pins which means they can only drive the pin output LOW (to reset the PHY) or to switch to input mode (to take the PHY out of reset). The GPIO subsystem already supports this with the GPIO_OPEN_DRAIN and GPIO_OPEN_SOURCE flags in the devicetree bindings. Add the stmmac PHY reset line specific active low parsing to gpiolib-of so stmmac can be ported to GPIO descriptors while being backwards compatible with device trees which use the "old" way of specifying the polarity. Signed-off-by: Martin Blumenstingl Reviewed-by: Linus Walleij --- drivers/gpio/gpiolib-of.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index aec7bd86ae7e..2533f2471821 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -158,6 +158,12 @@ static void of_gpio_flags_quirks(struct device_node *np, } } } + + /* Legacy handling of stmmac's active-low PHY reset line */ + if (IS_ENABLED(CONFIG_STMMAC_ETH) && + !strcmp(propname, "snps,reset-gpio") && + of_property_read_bool(np, "snps,reset-active-low")) + *flags |= OF_GPIO_ACTIVE_LOW; } /**