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[176.150.251.154]) by smtp.gmail.com with ESMTPSA id d24sm11658802wra.43.2019.07.01.03.47.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 01 Jul 2019 03:47:24 -0700 (PDT) From: Neil Armstrong To: jbrunet@baylibre.com, khilman@baylibre.com Subject: [RFC 01/11] soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs Date: Mon, 1 Jul 2019 12:46:55 +0200 Message-Id: <20190701104705.18271-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701104705.18271-1-narmstrong@baylibre.com> References: <20190701104705.18271-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190701_034726_700501_16F29916 X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the SoC IDs for the S905X3 Amlogic SM1 SoC. Signed-off-by: Neil Armstrong Reviewed-by: Jerome Brunet Reviewed-by: Martin Blumenstingl --- drivers/soc/amlogic/meson-gx-socinfo.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c index bca34954518e..eb81d391b620 100644 --- a/drivers/soc/amlogic/meson-gx-socinfo.c +++ b/drivers/soc/amlogic/meson-gx-socinfo.c @@ -39,6 +39,7 @@ static const struct meson_gx_soc_id { { "TXHD", 0x27 }, { "G12A", 0x28 }, { "G12B", 0x29 }, + { "SM1", 0x2b }, }; static const struct meson_gx_package_id { @@ -65,6 +66,7 @@ static const struct meson_gx_package_id { { "S905D2", 0x28, 0x10, 0xf0 }, { "S905X2", 0x28, 0x40, 0xf0 }, { "S922X", 0x29, 0x40, 0xf0 }, + { "S905X3", 0x2b, 0x50, 0xf0 }, }; static inline unsigned int socinfo_to_major(u32 socinfo)