diff mbox series

[RESEND] drm/meson: vclk: use the correct G12A frac max value

Message ID 20190828132311.23881-1-narmstrong@baylibre.com (mailing list archive)
State Not Applicable
Delegated to: Neil Armstrong
Headers show
Series [RESEND] drm/meson: vclk: use the correct G12A frac max value | expand

Commit Message

Neil Armstrong Aug. 28, 2019, 1:23 p.m. UTC
When calculating the HDMI PLL settings for a DMT mode PHY frequency,
use the correct max fractional PLL value for G12A VPU.

With this fix, we can finally setup the 1024x768-60 mode.

Fixes: 202b9808f8ed ("drm/meson: Add G12A Video Clock setup")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
Fixed typo in commit log, 1024x76 => 1024x768

 drivers/gpu/drm/meson/meson_vclk.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

Comments

Neil Armstrong Sept. 25, 2019, 11:41 a.m. UTC | #1
Ping, could someone review this patch ?

Neil

On 28/08/2019 15:23, Neil Armstrong wrote:
> When calculating the HDMI PLL settings for a DMT mode PHY frequency,
> use the correct max fractional PLL value for G12A VPU.
> 
> With this fix, we can finally setup the 1024x768-60 mode.
> 
> Fixes: 202b9808f8ed ("drm/meson: Add G12A Video Clock setup")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> Fixed typo in commit log, 1024x76 => 1024x768
> 
>  drivers/gpu/drm/meson/meson_vclk.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
> index ac491a781952..f690793ae2d5 100644
> --- a/drivers/gpu/drm/meson/meson_vclk.c
> +++ b/drivers/gpu/drm/meson/meson_vclk.c
> @@ -638,13 +638,18 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
>  		if (frac >= HDMI_FRAC_MAX_GXBB)
>  			return false;
>  	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
> -		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) ||
> -		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
> +		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
>  		/* Empiric supported min/max dividers */
>  		if (m < 106 || m > 247)
>  			return false;
>  		if (frac >= HDMI_FRAC_MAX_GXL)
>  			return false;
> +	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
> +		/* Empiric supported min/max dividers */
> +		if (m < 106 || m > 247)
> +			return false;
> +		if (frac >= HDMI_FRAC_MAX_G12A)
> +			return false;
>  	}
>  
>  	return true;
>
Kevin Hilman Sept. 26, 2019, 9:08 p.m. UTC | #2
Neil Armstrong <narmstrong@baylibre.com> writes:

> When calculating the HDMI PLL settings for a DMT mode PHY frequency,
> use the correct max fractional PLL value for G12A VPU.
>
> With this fix, we can finally setup the 1024x768-60 mode.
>
> Fixes: 202b9808f8ed ("drm/meson: Add G12A Video Clock setup")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong Sept. 30, 2019, 1:23 p.m. UTC | #3
On 26/09/2019 23:08, Kevin Hilman wrote:
> Neil Armstrong <narmstrong@baylibre.com> writes:
> 
>> When calculating the HDMI PLL settings for a DMT mode PHY frequency,
>> use the correct max fractional PLL value for G12A VPU.
>>
>> With this fix, we can finally setup the 1024x768-60 mode.
>>
>> Fixes: 202b9808f8ed ("drm/meson: Add G12A Video Clock setup")
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> 
> Reviewed-by: Kevin Hilman <khilman@baylibre.com>
> 

Applied to drm-misc-next for v5.5
diff mbox series

Patch

diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index ac491a781952..f690793ae2d5 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -638,13 +638,18 @@  static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
 		if (frac >= HDMI_FRAC_MAX_GXBB)
 			return false;
 	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
-		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) ||
-		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
+		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
 		/* Empiric supported min/max dividers */
 		if (m < 106 || m > 247)
 			return false;
 		if (frac >= HDMI_FRAC_MAX_GXL)
 			return false;
+	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
+		/* Empiric supported min/max dividers */
+		if (m < 106 || m > 247)
+			return false;
+		if (frac >= HDMI_FRAC_MAX_G12A)
+			return false;
 	}
 
 	return true;