| Message ID | 20201120153229.3920123-4-narmstrong@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: meson-axg-s400: add support for USB and PCIe | expand |
Hi Neil, (I have to admit that for me the PCI(e) bindings are very complex, so I may be mixing up things. I am still sending this review mail because "you're doing it different than in meson-g12-common.dtsi") On Fri, Nov 20, 2020 at 4:33 PM Neil Armstrong <narmstrong@baylibre.com> wrote: [...] > + pcieA: pcie@f9800000 { > + compatible = "amlogic,axg-pcie", "snps,dw-pcie"; > + reg = <0x0 0xf9800000 0x0 0x400000>, > + <0x0 0xff646000 0x0 0x2000>, > + <0x0 0xf9f00000 0x0 0x100000>; > + reg-names = "elbi", "cfg", "config"; > + interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; > + #interrupt-cells = <1>; > + interrupt-map-mask = <0 0 0 0>; > + interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>; > + bus-range = <0x0 0xff>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>; only PCI IO space here, no PCI MEM space? [...] > + pcieB: pcie@fa000000 { > + compatible = "amlogic,axg-pcie", "snps,dw-pcie"; > + reg = <0x0 0xfa000000 0x0 0x400000>, > + <0x0 0xff648000 0x0 0x2000>, > + <0x0 0xfa400000 0x0 0x100000>; > + reg-names = "elbi", "cfg", "config"; > + interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>; > + #interrupt-cells = <1>; > + interrupt-map-mask = <0 0 0 0>; > + interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; > + bus-range = <0x0 0xff>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>; same as above: only PCI IO space here, no PCI MEM space? Best regards, Martin
On 22/11/2020 23:14, Martin Blumenstingl wrote: > Hi Neil, > > (I have to admit that for me the PCI(e) bindings are very complex, so > I may be mixing up things. I am still sending this review mail because > "you're doing it different than in meson-g12-common.dtsi") > > On Fri, Nov 20, 2020 at 4:33 PM Neil Armstrong <narmstrong@baylibre.com> wrote: > [...] >> + pcieA: pcie@f9800000 { >> + compatible = "amlogic,axg-pcie", "snps,dw-pcie"; >> + reg = <0x0 0xf9800000 0x0 0x400000>, >> + <0x0 0xff646000 0x0 0x2000>, >> + <0x0 0xf9f00000 0x0 0x100000>; >> + reg-names = "elbi", "cfg", "config"; >> + interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; >> + #interrupt-cells = <1>; >> + interrupt-map-mask = <0 0 0 0>; >> + interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>; >> + bus-range = <0x0 0xff>; >> + #address-cells = <3>; >> + #size-cells = <2>; >> + device_type = "pci"; >> + ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>; > only PCI IO space here, no PCI MEM space? I know, I tried to add IO & MEM space like g12, but it doesn't work. > > [...] >> + pcieB: pcie@fa000000 { >> + compatible = "amlogic,axg-pcie", "snps,dw-pcie"; >> + reg = <0x0 0xfa000000 0x0 0x400000>, >> + <0x0 0xff648000 0x0 0x2000>, >> + <0x0 0xfa400000 0x0 0x100000>; >> + reg-names = "elbi", "cfg", "config"; >> + interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>; >> + #interrupt-cells = <1>; >> + interrupt-map-mask = <0 0 0 0>; >> + interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; >> + bus-range = <0x0 0xff>; >> + #address-cells = <3>; >> + #size-cells = <2>; >> + device_type = "pci"; >> + ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>; > same as above: only PCI IO space here, no PCI MEM space? Same, I suspect they configured the two instance differently. Anyway I managed to used an NVMe and a PCIe XHCI controller on each port successfully. Since I'm a PCIe nOOb, I don't know... Neil > > > Best regards, > Martin >
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 0c4f0cf076ab..b5a06210c49a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -172,6 +172,58 @@ soc { #size-cells = <2>; ranges; + pcieA: pcie@f9800000 { + compatible = "amlogic,axg-pcie", "snps,dw-pcie"; + reg = <0x0 0xf9800000 0x0 0x400000>, + <0x0 0xff646000 0x0 0x2000>, + <0x0 0xf9f00000 0x0 0x100000>; + reg-names = "elbi", "cfg", "config"; + interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>; + bus-range = <0x0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>; + + clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>; + clock-names = "general", "pclk", "port"; + resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>; + reset-names = "port", "apb"; + num-lanes = <1>; + phys = <&pcie_phy>; + phy-names = "pcie"; + status = "disabled"; + }; + + pcieB: pcie@fa000000 { + compatible = "amlogic,axg-pcie", "snps,dw-pcie"; + reg = <0x0 0xfa000000 0x0 0x400000>, + <0x0 0xff648000 0x0 0x2000>, + <0x0 0xfa400000 0x0 0x100000>; + reg-names = "elbi", "cfg", "config"; + interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; + bus-range = <0x0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>; + + clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>; + clock-names = "general", "pclk", "port"; + resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>; + reset-names = "port", "apb"; + num-lanes = <1>; + phys = <&pcie_phy>; + phy-names = "pcie"; + status = "disabled"; + }; + usb: usb@ffe09080 { compatible = "amlogic,meson-axg-usb-ctrl"; reg = <0x0 0xffe09080 0x0 0x20>; @@ -232,6 +284,15 @@ ethmac: ethernet@ff3f0000 { status = "disabled"; }; + pcie_phy: phy@ff644000 { + compatible = "amlogic,axg-pcie-phy"; + reg = <0x0 0xff644000 0x0 0x1c>; + resets = <&reset RESET_PCIE_PHY>; + phys = <&mipi_pcie_analog_dphy>; + phy-names = "analog"; + #phy-cells = <0>; + }; + pdm: audio-controller@ff632000 { compatible = "amlogic,axg-pdm"; reg = <0x0 0xff632000 0x0 0x34>;
This adds the nodes for the : - AXG PCIe PHY, using the shared analog PCIe/MIPI DSI PHY - 2x AXG PCIe controllers Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+)