diff mbox series

[V7,4/6] tty: serial: meson: Make some bit of the REG5 register writable

Message ID 20220225073922.3947-5-yu.tu@amlogic.com (mailing list archive)
State New, archived
Headers show
Series Use CCF to describe the UART baud rate clock | expand

Commit Message

Yu Tu Feb. 25, 2022, 7:39 a.m. UTC
Make the internal clock source mux and divider writeable, allowing the
uart to deviate from the settings intially applied by the ROMCode and
using the most appropriate clocks.

Signed-off-by: Yu Tu <yu.tu@amlogic.com>
---
 drivers/tty/serial/meson_uart.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 4768d51fac70..ba8dc203b9cb 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -686,7 +686,7 @@  static int meson_uart_probe_clocks(struct uart_port *port)
 						CLK_SET_RATE_NO_REPARENT,
 						port->membase + AML_UART_REG5,
 						26, 2,
-						CLK_DIVIDER_READ_ONLY,
+						CLK_DIVIDER_ROUND_CLOSEST,
 						xtal_div_table, NULL);
 	if (IS_ERR(hw))
 		return PTR_ERR(hw);
@@ -708,7 +708,7 @@  static int meson_uart_probe_clocks(struct uart_port *port)
 					CLK_SET_RATE_PARENT,
 					port->membase + AML_UART_REG5,
 					24, 0x1,
-					CLK_MUX_READ_ONLY,
+					CLK_MUX_ROUND_CLOSEST,
 					&use_xtal_mux_table, NULL);
 
 	if (IS_ERR(hw))