From patchwork Mon Aug 1 06:00:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 12933388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF0DDC00144 for ; Mon, 1 Aug 2022 06:02:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ji+5wu6b/gkp7sG639YiMlDLPpYqsblx2n866OocESI=; b=FG36I5glH7Dgsd ORIlz4IA5luxHQ7LSI2wFX+RITfvE9ARyuCw7XOKeKpY7yEZeKWtCuqQxDU7oGkLEN7pF5jCxKFg6 8jDIaVZsMxvezOorJiS/soSOI9NQIutChmy3t6c23al7Qhm5kzbBAwuLRWNoOB83ImnE5WQBOeLLk P4YB7njy9kdDiqKVSGUOjqgsDQeOrpV4d3tLgwq2A6qZBT2Ady8c6tEbOxer6uwTHL7cnZ/kUOppe dLxNnBDWUfY+2J5rVn5lX361RXJ+5DKyc07zbCTLP6tsOPBZkRH3aGZoLit6SJQOFMD54hxqi+DQj VrcJwJ1cGIytH+TZjPcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIOUt-002VgP-6j; Mon, 01 Aug 2022 06:01:47 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIOUL-002VA1-Q6; Mon, 01 Aug 2022 06:01:15 +0000 Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.9; Mon, 1 Aug 2022 14:00:56 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jiucheng Xu Subject: [PATCH v3 2/4] docs/perf: Add documentation for the Amlogic G12 DDR PMU Date: Mon, 1 Aug 2022 14:00:47 +0800 Message-ID: <20220801060049.1655177-2-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220801060049.1655177-1-jiucheng.xu@amlogic.com> References: <20220801060049.1655177-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220731_230113_870606_F56649B8 X-CRM114-Status: GOOD ( 17.55 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add a user guide to show how to use DDR PMU to monitor DDR bandwidth on Amlogic G12 SoC Signed-off-by: Jiucheng Xu --- Changes v2 -> v3: - Rename doc name from aml-ddr-pmu.rst to meson-ddr-pmu.rst Changes v1 -> v2: - Nothing was changed --- .../admin-guide/perf/meson-ddr-pmu.rst | 68 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 69 insertions(+) create mode 100644 Documentation/admin-guide/perf/meson-ddr-pmu.rst diff --git a/Documentation/admin-guide/perf/meson-ddr-pmu.rst b/Documentation/admin-guide/perf/meson-ddr-pmu.rst new file mode 100644 index 000000000000..f8601f3b103e --- /dev/null +++ b/Documentation/admin-guide/perf/meson-ddr-pmu.rst @@ -0,0 +1,68 @@ +.. SPDX-License-Identifier: GPL-2.0 +=========================================================== +Amlogic SoC DDR Bandwidth Performance Monitoring Unit (PMU) +=========================================================== + +There is a bandwidth monitor inside the DRAM contorller. The monitor include +4 channels which can count the read/write request of accessing DRAM individually. +It can be helpful to show if the performance bottleneck is on DDR bandwidth. + +Currently, this driver supports the following 5 Perf events: + +aml_ddr_bw/total_rw_bytes/ +aml_ddr_bw/chan_1_rw_bytes/ +aml_ddr_bw/chan_2_rw_bytes/ +aml_ddr_bw/chan_3_rw_bytes/ +aml_ddr_bw/chan_4_rw_bytes/ + +aml_ddr_bw/chan_{1,2,3,4}_rw_bytes/ events are the channel related events. +Each channel support using keywords as filter, which can let the channel +to monitor the individual IP module in SoC. + +The following keywords are the filter: + +arm - DDR access request from CPU +vpu_read1 - DDR access request from OSD + VPP read +gpu - DDR access request from 3D GPU +pcie - DDR access request from PCIe controller +hdcp - DDR access request from HDCP controller +hevc_front - DDR access request from HEVC codec front end +usb3_0 - DDR access request from USB3.0 controller +hevc_back - DDR access request from HEVC codec back end +h265enc - DDR access request from HEVC encoder +vpu_read2 - DDR access request from DI read +vpu_write1 - DDR access request from VDIN write +vpu_write2 - DDR access request from di write +vdec - DDR access request from legacy codec video decoder +hcodec - DDR access request from H264 encoder +ge2d - DDR access request from ge2d +spicc1 - DDR access request from SPI controller 1 +usb0 - DDR access request from USB2.0 controller 0 +dma - DDR access request from system DMA controller 1 +arb0 - DDR access request from arb0 +sd_emmc_b - DDR access request from SD eMMC b controller +usb1 - DDR access request from USB2.0 controller 1 +audio - DDR access request from Audio module +sd_emmc_c - DDR access request from SD eMMC c controller +spicc2 - DDR access request from SPI controller 2 +ethernet - DDR access request from Ethernet controller + +The following command is to show the total DDR bandwidth: + + .. code-block::bash + + perf stat -a -e aml_ddr_bw/total_rw_bytes/ -I 1000 sleep 10 + +This command will print the total DDR bandwidth per second. + +The following commands are to show how to use filter parameters: + + .. code-block::bash + + perf stat -a -e aml_ddr_bw/chan_1_rw_bytes,arm=1/ -I 1000 sleep 10 + perf stat -a -e aml_ddr_bw/chan_2_rw_bytes,gpu=1/ -I 1000 sleep 10 + perf stat -a -e aml_ddr_bw/chan_3_rw_bytes,arm=1,gpu=1/ -I 1000 sleep 10 + +The 1st command show how to use channel 1 to monitor the DDR bandwidth from ARM. +The 2nd command show using channel 2 to get the DDR bandwidth of GPU. +The 3rd command show using channel 3 to monitor the sum of ARM and GPU. diff --git a/MAINTAINERS b/MAINTAINERS index ac8a98dfbacc..8ee68e699e6d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1054,6 +1054,7 @@ AMLOGIC DDR PMU DRIVER M: Jiucheng Xu S: Supported W: http://www.amlogic.com +F: Documentation/admin-guide/perf/meson-ddr-pmu.rst F: drivers/perf/amlogic/ F: include/soc/amlogic/