From patchwork Mon Nov 21 02:16:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 13050295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C4D7C4332F for ; Mon, 21 Nov 2022 02:17:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DoOJyhKhiVXccklPB2DwR5m7F2cG8Ex0ZswL9YOenRo=; b=Tn904pEKkxYCNT T0oY6oEvp3dQjnMRRbJqhzvccVwA/eYOhcCUILht5AyY8PrfoPjG8OuEnUBcHeSnuiA/Jw4TF1NWa KIA+/2QbAnULPMzJT9hsABIR6mstqoM69ZFkNikOGVWWUdN2oxufTvBEfZO7PNliJdTEvHbTi1eyE z6wkHn9afobSap7boH/gmDqZBT4ZmxeSHayq/1lW5ZfgsPJz1TEEZAk18nyWI54N7+VEhtZtW+b8J xKQm9Y6AYPA5MJunMlTznUNSUdDOxt02+R0jYoVkuUodpYFn54KzKffJGF88rsbJE3qdKgETxjkM2 bYwoQZQq1A26xV384DwQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1owwMd-008S3X-At; Mon, 21 Nov 2022 02:16:51 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1owwMQ-008RyK-Hg; Mon, 21 Nov 2022 02:16:40 +0000 Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Mon, 21 Nov 2022 10:16:35 +0800 From: Jiucheng Xu To: Jiucheng Xu , Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski CC: Jianxin Pan , Kelvin Zhang , Chris Healy , Chris Healy , Krzysztof Kozlowski , , , , Subject: [PATCH v12 3/3] dt-binding: perf: Add Amlogic DDR PMU Date: Mon, 21 Nov 2022 10:16:00 +0800 Message-ID: <20221121021602.3306998-3-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221121021602.3306998-1-jiucheng.xu@amlogic.com> References: <20221121021602.3306998-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221120_181638_633564_CBD6128A X-CRM114-Status: GOOD ( 13.91 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add binding documentation for the Amlogic G12 series DDR performance monitor unit. Signed-off-by: Jiucheng Xu Reviewed-by: Krzysztof Kozlowski --- Changes v11 -> v12: - No change Changes v10 -> v11: - No change Changes v9 -> v10: - No change Changes v8 -> v9: - No change Changes v7 -> v8: - No change Changes v6 -> v7: - No change Changes v5 -> v6: - remove blank line Changes v4 -> v5: - Remove "items" in compatible since have only one item - Condense description of reg - Rename node - Split one reg into two reg items. - Binding go first Changes v3 -> v4: - Fix "$id: relative path/filename doesn't match actual path or filename" warning Changes v2 -> v3: - Remove oneOf - Add descriptions - Fix compiling warning Changes v1 -> v2: - Rename file, from aml_ddr_pmu.yaml to amlogic,g12_ddr_pmu.yaml - Delete "model", "dmc_nr", "chann_nr" new properties - Fix compiling error --- .../bindings/perf/amlogic,g12-ddr-pmu.yaml | 54 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml diff --git a/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml new file mode 100644 index 000000000000..50f46a6898b1 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic G12 DDR performance monitor + +maintainers: + - Jiucheng Xu + +description: | + Amlogic G12 series SoC integrate DDR bandwidth monitor. + A timer is inside and can generate interrupt when timeout. + The bandwidth is counted in the timer ISR. Different platform + has different subset of event format attribute. + +properties: + compatible: + enum: + - amlogic,g12a-ddr-pmu + - amlogic,g12b-ddr-pmu + - amlogic,sm1-ddr-pmu + + reg: + items: + - description: DMC bandwidth register space. + - description: DMC PLL register space. + + interrupts: + items: + - description: The IRQ of the inside timer timeout. + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + pmu { + #address-cells=<2>; + #size-cells=<2>; + + pmu@ff638000 { + compatible = "amlogic,g12a-ddr-pmu"; + reg = <0x0 0xff638000 0x0 0x100>, + <0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index b76c4deddf22..8b102a928081 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1099,6 +1099,7 @@ L: linux-amlogic@lists.infradead.org S: Supported W: http://www.amlogic.com F: Documentation/admin-guide/perf/meson-ddr-pmu.rst +F: Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml F: drivers/perf/amlogic/ F: include/soc/amlogic/