| Message ID | 20240401-basic_dt-v3-4-cb29ae1c16da@amlogic.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Baisc devicetree support for Amlogic A4 and A5 | expand |
On 01/04/2024 12:10, Xianwei Zhao via B4 Relay wrote: > From: Xianwei Zhao <xianwei.zhao@amlogic.com> > > Amlogic A4 is an application processor designed for smart audio > and IoT applications. > > Add basic support for the A4 based Amlogic BA400 board, which describes > the following components: CPU, GIC, IRQ, Timer and UART. > These are capable of booting up into the serial console. > > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> > --- > arch/arm64/boot/dts/amlogic/Makefile | 1 + > .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 42 ++++++++++++++ > arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi | 66 ++++++++++++++++++++++ > arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 40 +++++++++++++ > 4 files changed, 149 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile > index 1ab160bf928a..9a50ec11bb8d 100644 > --- a/arch/arm64/boot/dts/amlogic/Makefile > +++ b/arch/arm64/boot/dts/amlogic/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts > new file mode 100644 > index 000000000000..ad3127e695d9 > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts > @@ -0,0 +1,42 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include "amlogic-a4.dtsi" > + > +/ { > + model = "Amlogic A113L2 ba400 Development Board"; > + compatible = "amlogic,ba400", "amlogic,a4"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + aliases { > + serial0 = &uart_b; > + }; > + > + memory@0 { > + device_type = "memory"; > + reg = <0x0 0x0 0x0 0x40000000>; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + /* 10 MiB reserved for ARM Trusted Firmware */ > + secmon_reserved: secmon@5000000 { > + compatible = "shared-dma-pool"; > + reg = <0x0 0x05000000 0x0 0xa00000>; > + no-map; > + }; > + }; > +}; > + > +&uart_b { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi > new file mode 100644 > index 000000000000..b6106ad4a072 > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi > @@ -0,0 +1,66 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/gpio/gpio.h> > +/ { > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > + }; > + > + psci { > + compatible = "arm,psci-1.0"; > + method = "smc"; > + }; > + > + xtal: xtal-clk { > + compatible = "fixed-clock"; > + clock-frequency = <24000000>; > + clock-output-names = "xtal"; > + #clock-cells = <0>; > + }; > + > + soc { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + gic: interrupt-controller@fff01000 { > + compatible = "arm,gic-400"; > + reg = <0x0 0xfff01000 0 0x1000>, > + <0x0 0xfff02000 0 0x2000>, > + <0x0 0xfff04000 0 0x2000>, > + <0x0 0xfff06000 0 0x2000>; > + #interrupt-cells = <3>; > + #address-cells = <0>; > + interrupt-controller; > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; > + }; > + > + apb: bus@fe000000 { > + compatible = "simple-bus"; > + reg = <0x0 0xfe000000 0x0 0x480000>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; > + > + uart_b: serial@7a000 { > + compatible = "amlogic,a4-uart", > + "amlogic,meson-s4-uart"; > + reg = <0x0 0x7a000 0x0 0x18>; > + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; > + clocks = <&xtal>, <&xtal>, <&xtal>; > + clock-names = "xtal", "pclk", "baud"; > + status = "disabled"; > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi > new file mode 100644 > index 000000000000..73ca1d7eed81 > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi > @@ -0,0 +1,40 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. > + */ > + > +#include "amlogic-a4-common.dtsi" > +/ { > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x0 0x0>; > + enable-method = "psci"; > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x0 0x1>; > + enable-method = "psci"; > + }; > + > + cpu2: cpu@2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x0 0x2>; > + enable-method = "psci"; > + }; > + > + cpu3: cpu@3 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x0 0x3>; > + enable-method = "psci"; > + }; > + }; > +}; > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 1ab160bf928a..9a50ec11bb8d 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts new file mode 100644 index 000000000000..ad3127e695d9 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-a4.dtsi" + +/ { + model = "Amlogic A113L2 ba400 Development Board"; + compatible = "amlogic,ba400", "amlogic,a4"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_b; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 10 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@5000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x05000000 0x0 0xa00000>; + no-map; + }; + }; +}; + +&uart_b { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi new file mode 100644 index 000000000000..b6106ad4a072 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/gpio/gpio.h> +/ { + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@fff01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xfff01000 0 0x1000>, + <0x0 0xfff02000 0 0x2000>, + <0x0 0xfff04000 0 0x2000>, + <0x0 0xfff06000 0 0x2000>; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + + apb: bus@fe000000 { + compatible = "simple-bus"; + reg = <0x0 0xfe000000 0x0 0x480000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; + + uart_b: serial@7a000 { + compatible = "amlogic,a4-uart", + "amlogic,meson-s4-uart"; + reg = <0x0 0x7a000 0x0 0x18>; + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi new file mode 100644 index 000000000000..73ca1d7eed81 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +#include "amlogic-a4-common.dtsi" +/ { + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; +};