| Message ID | 20250320-a4-a5-reset-v5-2-296f83bf733d@amlogic.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for Amlogic A4/A5 Reset | expand |
On 20/03/2025 10:42, Kelvin Zhang via B4 Relay wrote: > From: Zelong Dong <zelong.dong@amlogic.com> > > Add the device node and related header file for Amlogic > A4 reset controller. > > Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> > Link: https://lore.kernel.org/r/20240918074211.8067-3-zelong.dong@amlogic.com > Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com> > --- > arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++++++++++ > arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 8 +++ > 2 files changed, 101 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h > new file mode 100644 > index 0000000000000000000000000000000000000000..f6a4c90bab3cf7cfaa3c98c522bed5e455b73bd3 > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h > @@ -0,0 +1,93 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ > +/* > + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. > + */ > + > +#ifndef __DTS_AMLOGIC_A4_RESET_H > +#define __DTS_AMLOGIC_A4_RESET_H > + > +/* RESET0 */ > +/* 0-3 */ > +#define RESET_USB 4 > +/* 5-6*/ > +#define RESET_U2PHY22 7 > +#define RESET_USBPHY20 8 > +#define RESET_U2PHY21 9 > +#define RESET_USB2DRD 10 > +#define RESET_U2H 11 > +#define RESET_LED_CTRL 12 > +/* 13-31 */ > + > +/* RESET1 */ > +#define RESET_AUDIO 32 > +#define RESET_AUDIO_VAD 33 > +/* 34*/ > +#define RESET_DDR_APB 35 > +#define RESET_DDR 36 > +#define RESET_VOUT_VENC 37 > +#define RESET_VOUT 38 > +/* 39-47 */ > +#define RESET_ETHERNET 48 > +/* 49-63 */ > + > +/* RESET2 */ > +#define RESET_DEVICE_MMC_ARB 64 > +#define RESET_IRCTRL 65 > +/* 66*/ > +#define RESET_TS_PLL 67 > +/* 68-72*/ > +#define RESET_SPICC_0 73 > +#define RESET_SPICC_1 74 > +/* 75-79*/ > +#define RESET_MSR_CLK 80 > +/* 81*/ > +#define RESET_SAR_ADC 82 > +/* 83-87*/ > +#define RESET_ACODEC 88 > +/* 89-90*/ > +#define RESET_WATCHDOG 91 > +/* 92-95*/ > + > +/* RESET3 */ > +/* 96-127 */ > + > +/* RESET4 */ > +/* 128-131 */ > +#define RESET_PWM_AB 132 > +#define RESET_PWM_CD 133 > +#define RESET_PWM_EF 134 > +#define RESET_PWM_GH 135 > +/* 136-137*/ > +#define RESET_UART_A 138 > +#define RESET_UART_B 139 > +/* 140*/ > +#define RESET_UART_D 141 > +#define RESET_UART_E 142 > +/* 143-144*/ > +#define RESET_I2C_M_A 145 > +#define RESET_I2C_M_B 146 > +#define RESET_I2C_M_C 147 > +#define RESET_I2C_M_D 148 > +/* 149-151*/ > +#define RESET_SDEMMC_A 152 > +/* 153*/ > +#define RESET_SDEMMC_C 154 > +/* 155-159*/ > + > +/* RESET5 */ > +/* 160-175*/ > +#define RESET_BRG_AO_NIC_SYS 176 > +/* 177*/ > +#define RESET_BRG_AO_NIC_MAIN 178 > +#define RESET_BRG_AO_NIC_AUDIO 179 > +/* 180-183*/ > +#define RESET_BRG_AO_NIC_ALL 184 > +/* 185*/ > +#define RESET_BRG_NIC_SDIO 186 > +#define RESET_BRG_NIC_EMMC 187 > +#define RESET_BRG_NIC_DSU 188 > +#define RESET_BRG_NIC_CLK81 189 > +#define RESET_BRG_NIC_MAIN 190 > +#define RESET_BRG_NIC_ALL 191 > + > +#endif > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi > index fa80fa365f13c4a93f5577f78bf2b3369cb91cb8..6537153b3026af1bf9d1df0a196619b716553cde 100644 > --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi > +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi > @@ -4,6 +4,7 @@ > */ > > #include "amlogic-a4-common.dtsi" > +#include "amlogic-a4-reset.h" > #include <dt-bindings/power/amlogic,a4-pwrc.h> > #include <dt-bindings/pinctrl/amlogic,pinctrl.h> > / { > @@ -51,6 +52,13 @@ pwrc: power-controller { > }; > > &apb { > + reset: reset-controller@2000 { > + compatible = "amlogic,a4-reset", > + "amlogic,meson-s4-reset"; > + reg = <0x0 0x2000 0x0 0x98>; > + #reset-cells = <1>; > + }; > + > gpio_intc: interrupt-controller@4080 { > compatible = "amlogic,a4-gpio-intc", > "amlogic,meson-gpio-intc"; > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h new file mode 100644 index 0000000000000000000000000000000000000000..f6a4c90bab3cf7cfaa3c98c522bed5e455b73bd3 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +#ifndef __DTS_AMLOGIC_A4_RESET_H +#define __DTS_AMLOGIC_A4_RESET_H + +/* RESET0 */ +/* 0-3 */ +#define RESET_USB 4 +/* 5-6*/ +#define RESET_U2PHY22 7 +#define RESET_USBPHY20 8 +#define RESET_U2PHY21 9 +#define RESET_USB2DRD 10 +#define RESET_U2H 11 +#define RESET_LED_CTRL 12 +/* 13-31 */ + +/* RESET1 */ +#define RESET_AUDIO 32 +#define RESET_AUDIO_VAD 33 +/* 34*/ +#define RESET_DDR_APB 35 +#define RESET_DDR 36 +#define RESET_VOUT_VENC 37 +#define RESET_VOUT 38 +/* 39-47 */ +#define RESET_ETHERNET 48 +/* 49-63 */ + +/* RESET2 */ +#define RESET_DEVICE_MMC_ARB 64 +#define RESET_IRCTRL 65 +/* 66*/ +#define RESET_TS_PLL 67 +/* 68-72*/ +#define RESET_SPICC_0 73 +#define RESET_SPICC_1 74 +/* 75-79*/ +#define RESET_MSR_CLK 80 +/* 81*/ +#define RESET_SAR_ADC 82 +/* 83-87*/ +#define RESET_ACODEC 88 +/* 89-90*/ +#define RESET_WATCHDOG 91 +/* 92-95*/ + +/* RESET3 */ +/* 96-127 */ + +/* RESET4 */ +/* 128-131 */ +#define RESET_PWM_AB 132 +#define RESET_PWM_CD 133 +#define RESET_PWM_EF 134 +#define RESET_PWM_GH 135 +/* 136-137*/ +#define RESET_UART_A 138 +#define RESET_UART_B 139 +/* 140*/ +#define RESET_UART_D 141 +#define RESET_UART_E 142 +/* 143-144*/ +#define RESET_I2C_M_A 145 +#define RESET_I2C_M_B 146 +#define RESET_I2C_M_C 147 +#define RESET_I2C_M_D 148 +/* 149-151*/ +#define RESET_SDEMMC_A 152 +/* 153*/ +#define RESET_SDEMMC_C 154 +/* 155-159*/ + +/* RESET5 */ +/* 160-175*/ +#define RESET_BRG_AO_NIC_SYS 176 +/* 177*/ +#define RESET_BRG_AO_NIC_MAIN 178 +#define RESET_BRG_AO_NIC_AUDIO 179 +/* 180-183*/ +#define RESET_BRG_AO_NIC_ALL 184 +/* 185*/ +#define RESET_BRG_NIC_SDIO 186 +#define RESET_BRG_NIC_EMMC 187 +#define RESET_BRG_NIC_DSU 188 +#define RESET_BRG_NIC_CLK81 189 +#define RESET_BRG_NIC_MAIN 190 +#define RESET_BRG_NIC_ALL 191 + +#endif diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi index fa80fa365f13c4a93f5577f78bf2b3369cb91cb8..6537153b3026af1bf9d1df0a196619b716553cde 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -4,6 +4,7 @@ */ #include "amlogic-a4-common.dtsi" +#include "amlogic-a4-reset.h" #include <dt-bindings/power/amlogic,a4-pwrc.h> #include <dt-bindings/pinctrl/amlogic,pinctrl.h> / { @@ -51,6 +52,13 @@ pwrc: power-controller { }; &apb { + reset: reset-controller@2000 { + compatible = "amlogic,a4-reset", + "amlogic,meson-s4-reset"; + reg = <0x0 0x2000 0x0 0x98>; + #reset-cells = <1>; + }; + gpio_intc: interrupt-controller@4080 { compatible = "amlogic,a4-gpio-intc", "amlogic,meson-gpio-intc";