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[v2] ARM: dts: meson8b: correct uart_B and uart_C clock references

Message ID trinity-bf20bcb9-790b-4ab9-99e3-0831ef8257f4-1680878185420@3c-app-gmx-bap55 (mailing list archive)
State New, archived
Headers show
Series [v2] ARM: dts: meson8b: correct uart_B and uart_C clock references | expand

Commit Message

Hans-Frieder Vogt April 7, 2023, 2:36 p.m. UTC
With the current device tree for meson8b, uarts B (e.g. available on pins
8/10 on Odroid-C1) and C (pins 3/5 on Odroid-C1) do not work, because they
are relying on incorrect clocks. Change the references of pclk to the
correct CLKID, to allow use of the two uarts.

Fixes: 3375aa77135f ("ARM: dts: meson8b: Fix the UART device-tree schema validation")
Signed-off-by: Hans-Frieder Vogt <hfdevel@gmx.net>
---
v1->v2: Addressed review comments with respect to patch style.

 meson8b.dtsi |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Martin Blumenstingl April 10, 2023, 9:14 p.m. UTC | #1
On Fri, Apr 7, 2023 at 4:36 PM <hfdevel@gmx.net> wrote:
>
> With the current device tree for meson8b, uarts B (e.g. available on pins
> 8/10 on Odroid-C1) and C (pins 3/5 on Odroid-C1) do not work, because they
> are relying on incorrect clocks. Change the references of pclk to the
> correct CLKID, to allow use of the two uarts.
>
> Fixes: 3375aa77135f ("ARM: dts: meson8b: Fix the UART device-tree schema validation")
Cc: stable@vger.kernel.org

> Signed-off-by: Hans-Frieder Vogt <hfdevel@gmx.net>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

PS: the author of this change seems to be just your email address, no
name attached.
I'm not sure if Neil can fix this when applying the patch. Generally
the rule is: patch author and signed-off-by line should be equal.

And finally: thanks again for spotting and fixing this!


Best regards,
Martin
Neil Armstrong May 9, 2023, 7:46 a.m. UTC | #2
Hi,

On Fri, 07 Apr 2023 16:36:25 +0200, hfdevel@gmx.net wrote:
> With the current device tree for meson8b, uarts B (e.g. available on pins
> 8/10 on Odroid-C1) and C (pins 3/5 on Odroid-C1) do not work, because they
> are relying on incorrect clocks. Change the references of pclk to the
> correct CLKID, to allow use of the two uarts.
> 
> 

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.5/arm-dt)

[1/1] ARM: dts: meson8b: correct uart_B and uart_C clock references
      https://git.kernel.org/amlogic/c/d542ce8d4769cdef6a7bc3437e59cfed9c68f0e4

These changes has been applied on the intermediate git tree [1].

The v6.5/arm-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index d5a3fe21e8e7..25f7c985f9ea 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -740,13 +740,13 @@  &uart_A {

 &uart_B {
 	compatible = "amlogic,meson8b-uart";
-	clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
+	clocks = <&xtal>, <&clkc CLKID_UART1>, <&clkc CLKID_CLK81>;
 	clock-names = "xtal", "pclk", "baud";
 };

 &uart_C {
 	compatible = "amlogic,meson8b-uart";
-	clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
+	clocks = <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
 	clock-names = "xtal", "pclk", "baud";
 };