From patchwork Thu Aug 30 16:16:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 10582247 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 03836920 for ; Thu, 30 Aug 2018 16:20:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E84842C116 for ; Thu, 30 Aug 2018 16:20:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DCE5C2C11C; Thu, 30 Aug 2018 16:20:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 818A42C11A for ; Thu, 30 Aug 2018 16:20:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=Gx3mjZ6CAISC58Ll+3tXoF3WWYUoelcvYi1RNGVrK4s=; b=u8q xXWI+VHWOUcj3GfUGfxIDQl8s05Ar5gjn1nNiNk4p/l+YUUip8F//Q7YHNaqvTGlm8eF3OR4XZO1o oqILyPoF9gA9nQqXGP6G3wKF7U1rjVDS44vEmy3oUy7hKepIWJla+Cxw9uPLYEh+NtqhKrB11JsQo n/ysJn0dTJglO4xbYBbvi/sh/DWPA302WWU3dmyGBH+PwW12CN2GcbBF9QWzK8XqDG6eJt4geyaAo FHCnLNkr1180gFLMlASAKExR9DH5IxNqT2joZzVmDqe8vSG6w3DPXbFkTEAzlzoOdDL4t1M787FyF xr4sGAaq4xYxtH7IclmgTSlQcNtUEJQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fvPgC-0006lK-9C; Thu, 30 Aug 2018 16:20:20 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fvPcB-0004iE-1Y for linux-arm-kernel@lists.infradead.org; Thu, 30 Aug 2018 16:16:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 74A521C2B; Thu, 30 Aug 2018 09:15:58 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 464C33F557; Thu, 30 Aug 2018 09:15:58 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 8B0931AE3614; Thu, 30 Aug 2018 17:16:10 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/6] Add support for PSTATE.SSBS to mitigate Spectre-v4 Date: Thu, 30 Aug 2018 17:16:00 +0100 Message-Id: <1535645767-9901-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180830_091611_144687_081EE076 X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, catalin.marinas@arm.com, Will Deacon , christoffer.dall@arm.com, suzuki.poulose@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hi all, Armv8.5 introduces a new PSTATE bit, SSBS, which can be used to mitigate Spectre-v4 dynamically without trapping to EL3 firmware. This patch hooks up support for this bit into the existing SSBD framework on CPUs that support it. The code is a maze of double-negatives but appears to work on the FastModel. Cheers, Will --->8 Will Deacon (7): arm64: Fix silly typo in comment arm64: cpufeature: Detect SSBS and advertise to userspace arm64: ssbd: Drop #ifdefs for PR_SPEC_STORE_BYPASS arm64: entry: Allow handling of undefined instructions from EL1 arm64: ssbd: Add support for PSTATE.SSBS rather than trapping to EL3 KVM: arm64: Set SCTLR_EL2.DSSBS if SSBD is forcefully disabled and !vhe arm64: cpu: Move errata and feature enable callbacks closer to callers arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cpufeature.h | 2 +- arch/arm64/include/asm/kvm_host.h | 11 +++++ arch/arm64/include/asm/processor.h | 11 +++-- arch/arm64/include/asm/ptrace.h | 1 + arch/arm64/include/asm/sysreg.h | 19 ++++++-- arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/ptrace.h | 1 + arch/arm64/kernel/cpu_errata.c | 32 ++++++++++++- arch/arm64/kernel/cpufeature.c | 92 ++++++++++++++++++++++++++++++++---- arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/kernel/entry.S | 2 +- arch/arm64/kernel/process.c | 4 ++ arch/arm64/kernel/ssbd.c | 24 ++++++++-- arch/arm64/kernel/traps.c | 16 +++---- arch/arm64/kvm/hyp/sysreg-sr.c | 11 +++++ arch/arm64/mm/fault.c | 14 ------ 17 files changed, 198 insertions(+), 47 deletions(-)