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bh=zAO6Tet6gDB/CNPa1hnGxxIMwaV7xyFVyG/ZZBGAyiE=; b=tnLSvdFbz2Ae0ntfPmsAVYzKkvsmY7DKK0GlWexUM7YDmOUlsq5Qzi/K4Xe0muWTtP 18eQbOgOsQXthESOA2kW3JLa0hRsIGD0XBKWkZtl5SCf3PTzexC47cc6jMibKjcylp4U HrZCloHUGrQlDnQCv6ErKwxcYtRFKBWyoArxUd9Ajlv9Jm4UVoF8ma919BL3SfBEjrjv mEfaAyLZ31ASRZkar1B1d7wDb3acGLuGhwkGCZKeyY+OwxQtb0hGhGoyOHd3DXx9JLoE Kmeu3K32zpU7fkhELD1qThQ/4PEDzIhhB8KOlWndRFOYu53PRFKIpVi6xgfLHjyO3kHn EXKQ== X-Gm-Message-State: APzg51DoETncVYBFO29DNN8Xap/FJiIsRUW5BIgMzMPhjhkXdmkAjgGX 8MbiXbzG895Oznv61ZjnhWg= X-Google-Smtp-Source: ANB0VdY0hTquZqY/42jbEhsdk1PybZKW1fnEzzjV1zetAxqdit0VOQ8rSL0etPXvJOOyxlJjg32YaQ== X-Received: by 2002:a63:f26:: with SMTP id e38-v6mr30119377pgl.354.1536062113495; Tue, 04 Sep 2018 04:55:13 -0700 (PDT) Received: from machine421.caveonetworks.com ([115.113.156.2]) by smtp.googlemail.com with ESMTPSA id u184-v6sm29740190pgd.46.2018.09.04.04.55.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Sep 2018 04:55:12 -0700 (PDT) From: sunil.kovvuri@gmail.com To: linux-kernel@vger.kernel.org, arnd@arndb.de, olof@lixom.net Subject: [PATCH v2 00/15] soc: octeontx2: Add RVU admin function driver Date: Tue, 4 Sep 2018 17:24:35 +0530 Message-Id: <1536062090-30446-1-git-send-email-sunil.kovvuri@gmail.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180904_045524_995023_A0CE99A1 X-CRM114-Status: GOOD ( 12.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@lunn.ch, linux-soc@vger.kernel.org, davem@davemloft.net, linux-arm-kernel@lists.infradead.org, Sunil Goutham MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sunil Goutham Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC supports multiple PCIe SRIOV physical functions (PFs) and virtual functions (VFs). PF0 is called administrative / admin function (AF) and has privilege access to registers to provision different RVU functional blocks to each of PF/VF. This admin function (AF) driver acts as a configuration / administrative software which provisions functional blocks to a PF/VF on demand for them to work as one of the following - A basic network controller (i.e NIC). - NIC with packet filtering, shaping and scheduling capabilities. - A crypto device. - A combination of above etc. PF/VFs communicate with admin function via a shared memory region. This patch series adds logic for the following - RVU AF driver with functional blocks provisioning support - Mailbox infrastructure for communication between AF and PFs. - CGX driver which provides information about physcial network interfaces which AF processes and forwards required info to PF/VF drivers. This is the first set of patches out of 70 odd patches. Note: This driver neither receives any data nor processes it i.e no I/O, just does the hardware configuration. Changes from v1: 1 Merged RVU admin function and CGX drivers into a single module - Suggested by Arnd Bergmann 2 Pulled mbox communication APIs into a separate module to remove admin function driver dependency in a VM where AF is not attached. - Suggested by Arnd Bergmann Aleksey Makarov (2): soc: octeontx2: Add mailbox support infra soc: octeontx2: Convert mbox msg id check to a macro Geetha sowjanya (1): soc: octeontx2: Reconfig MSIX base with IOVA Linu Cherian (3): soc: octeontx2: Set RVU PFs to CGX LMACs mapping soc: octeontx2: Add support for CGX link management soc: octeontx2: Register for CGX lmac events Sunil Goutham (9): soc: octeontx2: Add Marvell OcteonTX2 RVU AF driver soc: octeontx2: Reset all RVU blocks soc: octeontx2: Gather RVU blocks HW info soc: octeontx2: Add mailbox IRQ and msg handlers soc: octeontx2: Scan blocks for LFs provisioned to PF/VF soc: octeontx2: Add RVU block LF provisioning support soc: octeontx2: Configure block LF's MSIX vector offset soc: octeontx2: Add Marvell OcteonTX2 CGX driver MAINTAINERS: Add entry for Marvell OcteonTX2 Admin Function driver MAINTAINERS | 10 + drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/marvell/Kconfig | 18 + drivers/soc/marvell/Makefile | 2 + drivers/soc/marvell/octeontx2/Makefile | 10 + drivers/soc/marvell/octeontx2/cgx.c | 517 +++++++++ drivers/soc/marvell/octeontx2/cgx.h | 65 ++ drivers/soc/marvell/octeontx2/cgx_fw_if.h | 225 ++++ drivers/soc/marvell/octeontx2/mbox.c | 303 +++++ drivers/soc/marvell/octeontx2/mbox.h | 211 ++++ drivers/soc/marvell/octeontx2/rvu.c | 1637 ++++++++++++++++++++++++++++ drivers/soc/marvell/octeontx2/rvu.h | 158 +++ drivers/soc/marvell/octeontx2/rvu_cgx.c | 194 ++++ drivers/soc/marvell/octeontx2/rvu_reg.h | 442 ++++++++ drivers/soc/marvell/octeontx2/rvu_struct.h | 78 ++ 16 files changed, 3872 insertions(+) create mode 100644 drivers/soc/marvell/Kconfig create mode 100644 drivers/soc/marvell/Makefile create mode 100644 drivers/soc/marvell/octeontx2/Makefile create mode 100644 drivers/soc/marvell/octeontx2/cgx.c create mode 100644 drivers/soc/marvell/octeontx2/cgx.h create mode 100644 drivers/soc/marvell/octeontx2/cgx_fw_if.h create mode 100644 drivers/soc/marvell/octeontx2/mbox.c create mode 100644 drivers/soc/marvell/octeontx2/mbox.h create mode 100644 drivers/soc/marvell/octeontx2/rvu.c create mode 100644 drivers/soc/marvell/octeontx2/rvu.h create mode 100644 drivers/soc/marvell/octeontx2/rvu_cgx.c create mode 100644 drivers/soc/marvell/octeontx2/rvu_reg.h create mode 100644 drivers/soc/marvell/octeontx2/rvu_struct.h