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- PWM5/PWM6/PWM7/PWM8; - eCSPI3/eCSPI4; - CAN1/CAN2; - FEC1/FEC2; - I2C3/I2C4; - EPIT2; - LCDIF; - GPT2; - TSC; And i.MX6ULZ has same soc_id as i.MX6ULL, but SRC_SBMR2 bit[6] is to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and 1'b0 means i.MX6ULL. i.MX6ULZ reuse most of i.MX6UL/i.MX6ULL code, just add the new CPU type and remove those non-exist modules from dtb. Anson Huang (4): ARM: imx: add i.mx6ulz msl support clk: imx6ul: add i.mx6ulz support dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support Documentation/devicetree/bindings/arm/fsl.txt | 4 +++ arch/arm/boot/dts/Makefile | 3 ++- arch/arm/boot/dts/imx6ulz-14x14-evk.dts | 20 ++++++++++++++ arch/arm/boot/dts/imx6ulz.dtsi | 38 +++++++++++++++++++++++++++ arch/arm/mach-imx/anatop.c | 20 ++++++++++++++ arch/arm/mach-imx/cpu.c | 3 +++ arch/arm/mach-imx/mach-imx6ul.c | 1 + arch/arm/mach-imx/mxc.h | 7 +++++ arch/arm/mach-imx/pm-imx6.c | 4 +-- drivers/clk/imx/clk-imx6ul.c | 3 ++- 10 files changed, 99 insertions(+), 4 deletions(-) create mode 100644 arch/arm/boot/dts/imx6ulz-14x14-evk.dts create mode 100644 arch/arm/boot/dts/imx6ulz.dtsi